Searched refs:LR (Results 1 – 12 of 12) sorted by relevance
| /arch/arm/kernel/ |
| A D | entry-ftrace.S | 67 str lr, [sp, #-8]! @ store LR as PC and make space for CPSR/OLD_R0,
68 @ OLD_R0 will overwrite previous LR
70 ldr lr, [sp, #8] @ get previous LR
72 str r0, [sp, #8] @ write r0 as OLD_R0 over previous LR
74 str lr, [sp, #-4]! @ store previous LR as LR
76 add lr, sp, #16 @ move in LR the value of SP as it was
83 @ R0 | R1 | ... | IP | SP + 4 | previous LR | LR | PSR | OLD_R0 |
92 ldr lr, [sp, #S_PC] @ get LR
109 ldr lr, [sp], #4 @ restore LR
132 ldr lr, [sp], #4 @ restore LR
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| A D | unwind.c | 76 LR = 14, enumerator
371 ctrl->vrs[PC] = ctrl->vrs[LR]; in unwind_exec_insn()
396 ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); in unwind_exec_insn()
439 ctrl.vrs[LR] = frame->lr; in unwind_frame()
507 ctrl.vrs[PC] = ctrl.vrs[LR]; in unwind_frame()
515 frame->lr = ctrl.vrs[LR]; in unwind_frame()
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| A D | entry-v7m.S | 53 push {r0, lr} @ preserve LR and original SP
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| A D | entry-header.S | 173 @ Store/load the USER SP and LR registers by switching to the SYS
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| /arch/powerpc/kernel/ |
| A D | swsusp_asm64.S | 83 SAVE_SPECIAL(LR)
129 RESTORE_SPECIAL(LR)
263 RESTORE_SPECIAL(LR)
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| /arch/arm/lib/ |
| A D | backtrace.S | 67 bic sv_pc, sv_pc, mask @ mask PC/LR for the mode
77 bic r1, r1, mask @ mask PC/LR for the mode
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| /arch/arm/mm/ |
| A D | proc-v7m.S | 134 mov r6, lr @ save LR
143 mov lr, r6 @ restore LR
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| /arch/powerpc/platforms/52xx/ |
| A D | lite5200_sleep.S | 71 SAVE_SPRN(LR, 0x1c)
252 LOAD_SPRN(LR, 0x1c)
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| /arch/arm/boot/dts/ti/omap/ |
| A D | omap3-evm-common.dtsi | 105 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
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| /arch/powerpc/platforms/8xx/ |
| A D | Kconfig | 121 (by not placing conditional branches or branches to LR or CTR
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| /arch/riscv/ |
| A D | Kconfig | 533 LR/SC with Ziccrse provide such guarantee.
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| /arch/arm64/tools/ |
| A D | sysreg | 4973 Field 7:0 LR
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