Home
last modified time | relevance | path

Searched refs:MCI_STATUS_MISCV (Results 1 – 6 of 6) sorted by relevance

/arch/x86/kernel/cpu/mce/
A Dapei.c52 m->status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | MCI_STATUS_MISCV | 0x9f; in apei_mce_report_mem_error()
A Dcore.c566 if (!mca_cfg.ser || !(m->status & MCI_STATUS_MISCV)) in whole_page()
686 if (m->status & MCI_STATUS_MISCV) in mce_read_aux()
695 if (mca_cfg.ser && (m->status & MCI_STATUS_MISCV)) { in mce_read_aux()
860 MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV| in quirk_sandybridge_ifu()
864 MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S| in quirk_sandybridge_ifu()
907 MCI_STATUS_ADDRV | MCI_STATUS_MISCV | MCI_STATUS_PCC | in quirk_skylake_repmov()
910 MCI_STATUS_ADDRV | MCI_STATUS_MISCV | in quirk_skylake_repmov()
A Dintel.c509 if (!(m->status & MCI_STATUS_MISCV)) in intel_mce_usable_address()
A Dseverity.c70 #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
A Dinject.c515 i_mce.status |= MCI_STATUS_MISCV; in do_inject()
/arch/x86/include/asm/
A Dmce.h39 #define MCI_STATUS_MISCV BIT_ULL(59) /* misc error reg. valid */ macro

Completed in 16 milliseconds