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Searched refs:MSR (Results 1 – 10 of 10) sorted by relevance

/arch/x86/xen/
A DKconfig97 bool "Always use safe MSR accesses in PV guests"
101 Use safe (not faulting) MSR access functions even if the MSR access
/arch/sparc/include/asm/
A Dfloppy_64.h449 #define MSR (port + 4) macro
458 while (!((status = inb(MSR)) & 0x80) && --timeout) in sun_pci_fd_out_byte()
473 while (!((status = inb(MSR)) & 0x80) && --timeout) in sun_pci_fd_sensei()
494 outb(0x80, MSR); in sun_pci_fd_reset()
532 #undef MSR
/arch/powerpc/kernel/
A Dswsusp_asm64.S108 SAVE_SPECIAL(MSR)
237 RESTORE_SPECIAL(MSR)
/arch/x86/boot/
A Dearly_serial_console.c20 #define MSR 6 /* Modem Status */ macro
/arch/x86/kernel/
A Dverify_cpu.S100 jnc .Lverify_cpu_check # only write MSR if bit was changed
A Dearly_printk.c95 #define MSR 6 /* Modem Status */ macro
/arch/arm/boot/dts/nxp/mxs/
A Dimx28-m28cu3.dts10 model = "MSR M28CU3";
/arch/x86/kvm/
A Dcpuid.c856 F(MSR), in kvm_set_cpu_caps()
1052 ALIASED_1_EDX_F(MSR), in kvm_set_cpu_caps()
/arch/arm64/
A DKconfig1115 bool "Cortex-*/Neoverse-*: workaround for MSR SSBS not self-synchronizing"
1142 On affected cores "MSR SSBS, #0" instructions may not affect
/arch/x86/
A DKconfig714 MSR's for some register accesses, mostly but not limited to thermal
1369 MSR accesses are directed to a specific CPU on multi-processor

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