Searched refs:MSR (Results 1 – 10 of 10) sorted by relevance
97 bool "Always use safe MSR accesses in PV guests"101 Use safe (not faulting) MSR access functions even if the MSR access
449 #define MSR (port + 4) macro458 while (!((status = inb(MSR)) & 0x80) && --timeout) in sun_pci_fd_out_byte()473 while (!((status = inb(MSR)) & 0x80) && --timeout) in sun_pci_fd_sensei()494 outb(0x80, MSR); in sun_pci_fd_reset()532 #undef MSR
108 SAVE_SPECIAL(MSR)237 RESTORE_SPECIAL(MSR)
20 #define MSR 6 /* Modem Status */ macro
100 jnc .Lverify_cpu_check # only write MSR if bit was changed
95 #define MSR 6 /* Modem Status */ macro
10 model = "MSR M28CU3";
856 F(MSR), in kvm_set_cpu_caps()1052 ALIASED_1_EDX_F(MSR), in kvm_set_cpu_caps()
1115 bool "Cortex-*/Neoverse-*: workaround for MSR SSBS not self-synchronizing"1142 On affected cores "MSR SSBS, #0" instructions may not affect
714 MSR's for some register accesses, mostly but not limited to thermal1369 MSR accesses are directed to a specific CPU on multi-processor
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