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Searched refs:MUX_CFG (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-omap1/
A Dmux.c30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
40 MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0)
41 MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0)
42 MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0)
49 MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0)
[all …]
A Dmux.h75 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ macro
/arch/arm/mach-davinci/
A Dda850.c61 MUX_CFG(DA850, I2C0_SCL, 4, 8, 15, 2, false)
63 MUX_CFG(DA850, MII_TXEN, 2, 4, 15, 8, false)
71 MUX_CFG(DA850, MII_RXDV, 3, 4, 15, 8, false)
79 MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false)
89 MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false)
90 MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false)
91 MUX_CFG(DA850, AFSR, 0, 8, 15, 1, false)
92 MUX_CFG(DA850, AFSX, 0, 12, 15, 1, false)
104 MUX_CFG(DA850, AXR_7, 2, 0, 15, 1, false)
105 MUX_CFG(DA850, AXR_6, 2, 4, 15, 1, false)
[all …]
A Dmux.h259 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ macro

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