Searched refs:OP_TLBI_ASIDE1ISNXS (Results 1 – 4 of 4) sorted by relevance
| /arch/arm64/kvm/hyp/vhe/ |
| A D | tlb.c | 294 case OP_TLBI_ASIDE1ISNXS: in __kvm_tlbi_s1e2()
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| /arch/arm64/include/asm/ |
| A D | sysreg.h | 720 #define OP_TLBI_ASIDE1ISNXS sys_insn(1, 0, 9, 3, 2) macro
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| /arch/arm64/kvm/ |
| A D | nested.c | 976 case OP_TLBI_ASIDE1ISNXS: in compute_s1_tlbi_range()
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| A D | emulate-nested.c | 770 SR_TRAP(OP_TLBI_ASIDE1ISNXS, CGT_HCR_TTLB_TTLBIS),
1483 SR_FGF(OP_TLBI_ASIDE1ISNXS, HFGITR, TLBIASIDE1IS, 1, HCRX_FGTnXS),
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