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Searched refs:PESDR0_PLLLCT1 (Results 1 – 2 of 2) sorted by relevance

/arch/powerpc/platforms/44x/
A Dpci.h163 #define PESDR0_PLLLCT1 0x03a0 macro
A Dpci.c728 if (!(mfdcri(SDR0, PESDR0_PLLLCT1) & 0x01000000)) { in ppc440spe_pciex_check_reset()
802 dcri_clrset(SDR0, PESDR0_PLLLCT1, 0, 1 << 28); in ppc440spe_pciex_core_init()
816 dcri_clrset(SDR0, PESDR0_PLLLCT1, 1 << 24, 0); in ppc440spe_pciex_core_init()

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