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Searched refs:PL (Results 1 – 12 of 12) sorted by relevance

/arch/x86/crypto/
A Dpolyval-clmulni_asm.S31 #define PL %xmm8 macro
121 vpslldq $8, MI, PL
123 pxor LO, PL
166 vpclmulqdq $0x00, PL, GSTAR, TMP_XMM # TMP_XMM = T_1 : T_0 = P_0 * g*(x)
168 pxor PL, TMP_XMM # TMP_XMM = P_1 + T_0 : P_0 + T_1
190 vpclmulqdq $0x00, PL, GSTAR, TMP_XMM
200 pxor PL, TMP_XMM
/arch/arm64/crypto/
A Dpolyval-ce-core.S54 PL .req v16 label
150 ext PL.16b, LO.16b, v4.16b, #8
195 pmull TMP_V.1q, PL.1d, GSTAR.1d
199 eor TMP_V.16b, PL.16b, TMP_V.16b
228 pmull TMP_V.1q, PL.1d, GSTAR.1d
238 eor TMP_V.16b, PL.16b, TMP_V.16b
/arch/arm64/boot/dts/allwinner/
A Dsun50i-a64-olinuxino.dts206 /* VCC-PL is powered by aldo2 but we cannot add it as the RSB */
207 /* interface used to talk to the PMIC in on the PL pins */
/arch/arm64/boot/dts/xilinx/
A Dzynqmp-zcu111-revA.dts45 /* Another 4GB connected to PL */
443 /* refclk5 PL CLK100 */
448 /* refclk6 PL CLK125 */
A Dzynqmp-zcu102-revA.dts503 /* PL i2c via PCA9306 - u45 */
566 /* refclk6 PL CLK125 */
571 /* refclk7 PL CLK74 */
A Dzynqmp-zcu106-revA.dts514 /* PL i2c via PCA9306 - u45 */
567 /* refclk6 PL CLK125 */
572 /* refclk7 PL CLK74 */
A Dzynqmp-zcu104-revA.dts146 /* Another connection to this bus via PL i2c via PCA9306 - u45 */
A Dzynqmp-zcu104-revC.dts170 /* Another connection to this bus via PL i2c via PCA9306 - u45 */
/arch/arm/boot/dts/allwinner/
A Dsun8i-q8-common.dtsi68 * Q8 boards use various PL# pins as wifi-en. On other boards
A Dsun8i-h2-plus-bananapi-m2-zero.dts251 /* PL */
A Dsun6i-a31s-sinovoip-bpi-m2.dts324 /* PL */
/arch/arm/
A DKconfig.platforms139 This enables support for the RDA Micro 8810PL SoC family.

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