Searched refs:PSR_MODE_MASK (Results 1 – 12 of 12) sorted by relevance
203 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)206 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \210 ((regs)->pstate & PSR_MODE_MASK)
196 switch (ctxt->regs.pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) { in vcpu_is_el2_ctxt()310 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK; in vcpu_mode_priv()
347 mode = spsr & (PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_hyp_handle_eret()372 spsr = (spsr & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode; in kvm_hyp_handle_eret()539 u64 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in fixup_guest_exit()550 *vcpu_cpsr(vcpu) &= ~(PSR_MODE_MASK | PSR_MODE32_BIT); in fixup_guest_exit()
30 switch(*vcpu_cpsr(vcpu) & PSR_MODE_MASK) { in exception_target_el()128 if (is_aarch32 || (cpsr & PSR_MODE_MASK) == PSR_MODE_EL0t) in inject_abt64()
351 __entry->target_mode = spsr_el2 & (PSR_MODE_MASK | PSR_MODE32_BIT);381 __entry->source_mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);
525 u64 mode = spsr & PSR_MODE_MASK; in nvhe_hyp_panic_handler()
2637 u64 mode = spsr & PSR_MODE_MASK; in kvm_check_illegal_exception_return()2661 PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_check_illegal_exception_return()2761 mode = pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_inject_nested()
240 mode = regs->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK); in do_sdei_event()
152 and x0, x0, #~PSR_MODE_MASK
293 u64 mode = ctxt->regs.pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in to_hw_pstate()304 return (ctxt->regs.pstate & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode; in to_hw_pstate()
39 #define PSR_MODE_MASK 0x0000000f macro
99 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in enter_exception64()
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