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Searched refs:PTRS_PER_PTE (Results 1 – 25 of 106) sorted by relevance

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/arch/xtensa/mm/
A Dkasan_init.c24 for (i = 0; i < PTRS_PER_PTE; ++i) in kasan_early_init()
38 unsigned long n_pmds = n_pages / PTRS_PER_PTE; in populate()
49 for (k = 0; k < PTRS_PER_PTE; ++k, ++j) { in populate()
62 for (i = 0; i < n_pmds ; ++i, pte += PTRS_PER_PTE) in populate()
87 for (i = 0; i < PTRS_PER_PTE; ++i) in kasan_init()
A Dmmu.c30 n_pages = ALIGN(n_pages, PTRS_PER_PTE); in init_pmd()
43 for (i = 0; i < n_pages; i += PTRS_PER_PTE, ++pmd) { in init_pmd()
/arch/arc/mm/
A Dhighmem.c68 BUILD_BUG_ON(LAST_PKMAP > PTRS_PER_PTE); in kmap_init()
69 BUILD_BUG_ON(FIX_KMAP_SLOTS > PTRS_PER_PTE); in kmap_init()
/arch/hexagon/include/asm/
A Dpgtable.h80 #define PTRS_PER_PTE 1024 macro
84 #define PTRS_PER_PTE 256 macro
88 #define PTRS_PER_PTE 64 macro
92 #define PTRS_PER_PTE 16 macro
96 #define PTRS_PER_PTE 4 macro
/arch/m68k/include/asm/
A Dpgtable_mm.h58 #define PTRS_PER_PTE 16 macro
63 #define PTRS_PER_PTE 512 macro
68 #define PTRS_PER_PTE 64 macro
/arch/arm/include/asm/
A Dpgtable-2level.h70 #define PTRS_PER_PTE 512 macro
74 #define PTE_HWTABLE_PTRS (PTRS_PER_PTE)
76 #define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32))
/arch/s390/mm/
A Dpgalloc.c124 memset64(table, _PAGE_INVALID, PTRS_PER_PTE); in page_table_alloc_pgste()
125 memset64(table + PTRS_PER_PTE, 0, PTRS_PER_PTE); in page_table_alloc_pgste()
151 memset64((u64 *)table, _PAGE_INVALID, PTRS_PER_PTE); in page_table_alloc()
152 memset64((u64 *)table + PTRS_PER_PTE, 0, PTRS_PER_PTE); in page_table_alloc()
192 memset64((u64 *)table, _PAGE_INVALID, PTRS_PER_PTE); in base_pgt_alloc()
A Dpageattr.c76 mask = ~(PTRS_PER_PTE * sizeof(pte_t) - 1); in pgt_set()
139 for (i = 0; i < PTRS_PER_PTE; i++) { in split_pmd_page()
146 update_page_count(PG_DIRECT_MAP_4K, PTRS_PER_PTE); in split_pmd_page()
459 nr = PTRS_PER_PTE - (nr & (PTRS_PER_PTE - 1)); in __kernel_map_pages()
/arch/csky/mm/
A Dinit.c34 ((PTRS_PER_PGD - USER_PTRS_PER_PGD) * PTRS_PER_PTE)
37 pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
70 __pa(kernel_pte_tables + (PTRS_PER_PTE * (i - USER_PTRS_PER_PGD))); in mmu_init()
/arch/powerpc/mm/kasan/
A Dinit_book3s_64.c67 for (i = 0; i < PTRS_PER_PTE; i++) in kasan_init()
84 for (i = 0; i < PTRS_PER_PTE; i++) in kasan_init()
A Dinit_book3e_64.c92 for (i = 0; i < PTRS_PER_PTE; i++) in kasan_early_init()
120 for (i = 0; i < PTRS_PER_PTE; i++) in kasan_init()
/arch/powerpc/mm/book3s64/
A Dsubpage_prot.c122 i = (addr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); in subpage_prot_clear()
123 nw = PTRS_PER_PTE - i; in subpage_prot_clear()
261 i = (addr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); in SYSCALL_DEFINE3()
262 nw = PTRS_PER_PTE - i; in SYSCALL_DEFINE3()
A Dhash_64k.c91 rpte = __real_pte(__pte(old_pte), ptep, PTRS_PER_PTE); in __hash_page_4K()
218 new_pte |= pte_set_hidx(ptep, rpte, subpg_index, slot, PTRS_PER_PTE); in __hash_page_4K()
269 rpte = __real_pte(__pte(old_pte), ptep, PTRS_PER_PTE); in __hash_page_64K()
334 new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE); in __hash_page_64K()
A Dhash_4k.c60 rpte = __real_pte(__pte(old_pte), ptep, PTRS_PER_PTE); in __hash_page_4K()
122 new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE); in __hash_page_4K()
/arch/m68k/mm/
A Dsun3mmu.c65 next_pgtable += PTRS_PER_PTE * sizeof (pte_t); in paging_init()
71 for (i=0; i<PTRS_PER_PTE; ++i, ++pg_table) { in paging_init()
/arch/arm64/kernel/pi/
A Dmap_range.c41 tbl += (start >> (lshift + PAGE_SHIFT)) % PTRS_PER_PTE; in map_range()
61 *pte += PTRS_PER_PTE * sizeof(pte_t); in map_range()
/arch/mips/include/asm/
A Dpgtable-32.h89 # define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t) / 2) macro
91 # define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t)) macro
119 extern pte_t invalid_pte_table[PTRS_PER_PTE];
A Dpgtable-64.h132 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t)) macro
144 min(PTRS_PER_PGD * PTRS_PER_PUD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
167 extern pte_t invalid_pte_table[PTRS_PER_PTE];
/arch/arm64/mm/
A Dkasan_init.c26 static pgd_t tmp_pg_dir[PTRS_PER_PTE] __initdata __aligned(PAGE_SIZE);
217 static pte_t tbl[PTRS_PER_PTE] __page_aligned_bss; in kasan_early_init()
274 return (addr >> (shift + PAGE_SHIFT)) % PTRS_PER_PTE; in next_level_idx()
294 clear_next_level(l++, next_level_idx(start), PTRS_PER_PTE); in clear_shadow()
368 for (i = 0; i < PTRS_PER_PTE; i++) in kasan_init_shadow()
/arch/x86/include/asm/
A Dpgtable-2level_types.h36 #define PTRS_PER_PTE 1024 macro
A Dpgtable-3level_types.h48 #define PTRS_PER_PTE 512 macro
/arch/x86/power/
A Dhibernate_32.c111 pfn += PTRS_PER_PTE; in resume_physical_mapping_init()
119 max_pte = pte + PTRS_PER_PTE; in resume_physical_mapping_init()
/arch/um/include/asm/
A Dpgtable-2level.h23 #define PTRS_PER_PTE 1024 macro
/arch/x86/mm/
A Dinit_32.c177 for (i = 0; i < PTRS_PER_PTE; i++) in page_table_kmap_check()
189 && lastpte && lastpte + PTRS_PER_PTE != pte); in page_table_kmap_check()
324 addr2 = (pfn + PTRS_PER_PTE-1) * PAGE_SIZE + in kernel_physical_mapping_init()
337 pfn += PTRS_PER_PTE; in kernel_physical_mapping_init()
344 for (; pte_ofs < PTRS_PER_PTE && pfn < end_pfn; in kernel_physical_mapping_init()
/arch/riscv/kvm/
A Dtlb.c29 if (PTRS_PER_PTE < (gpsz >> order)) { in kvm_riscv_local_hfence_gvma_vmid_gpa()
57 if (PTRS_PER_PTE < (gpsz >> order)) { in kvm_riscv_local_hfence_gvma_gpa()
88 if (PTRS_PER_PTE < (gvsz >> order)) { in kvm_riscv_local_hfence_vvma_asid_gva()
128 if (PTRS_PER_PTE < (gvsz >> order)) { in kvm_riscv_local_hfence_vvma_gva()

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