Searched refs:REG1 (Results 1 – 11 of 11) sorted by relevance
| /arch/sparc/include/asm/ |
| A D | tsb.h | 162 ldx [REG1 + REG2], REG1; \
187 andn REG1, REG2, REG1; \
190 or REG1, REG2, REG1; \
223 andn REG1, REG2, REG1; \
226 or REG1, REG2, REG1; \
254 or REG1, REG2, REG1; \
291 add REG1, REG2, REG1; \
346 sllx REG1, 32, REG1; \
347 or REG1, REG2, REG1; \
369 sllx REG1, 32, REG1; \
[all …]
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| A D | trap_block.h | 184 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ argument
185 lduh [THR + TI_CPU], REG1; \
187 sllx REG1, TRAP_BLOCK_SZ_SHIFT, REG1; \
189 add REG2, REG1, REG2; \
213 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) argument
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| /arch/arm64/boot/dts/rockchip/ |
| A D | rk3368-evb-act8846.dts | 54 vcc_ddr: REG1 {
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| /arch/arm/boot/dts/rockchip/ |
| A D | rk3288-evb-act8846.dts | 85 vcc_ddr: REG1 {
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| A D | rk3288-firefly-reload-core.dtsi | 112 vcc_ddr: REG1 {
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| A D | rk3288-rock2-som.dtsi | 98 vcc_ddr: REG1 {
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| A D | rk3188-radxarock.dts | 200 vcc_ddr: REG1 {
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| A D | rk3288-r89.dts | 179 vcc_ddr: REG1 {
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| A D | rk3288-miqi.dts | 188 vcc_ddr: REG1 {
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| A D | rk3288-firefly.dtsi | 263 vcc_ddr: REG1 {
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| A D | rk3188-bqedison2qc.dts | 318 vcc_ddr: REG1 {
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