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Searched refs:REG_S (Results 1 – 25 of 29) sorted by relevance

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/arch/riscv/kernel/
A Dcrash_save_regs.S14 REG_S ra, PT_RA(a0) /* x1 */
15 REG_S sp, PT_SP(a0) /* x2 */
16 REG_S gp, PT_GP(a0) /* x3 */
17 REG_S tp, PT_TP(a0) /* x4 */
18 REG_S t0, PT_T0(a0) /* x5 */
19 REG_S t1, PT_T1(a0) /* x6 */
20 REG_S t2, PT_T2(a0) /* x7 */
51 REG_S t1, PT_STATUS(a0)
52 REG_S t2, PT_EPC(a0)
53 REG_S t3, PT_BADADDR(a0)
[all …]
A Dsuspend_entry.S21 REG_S ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0)
22 REG_S sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0)
23 REG_S gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0)
24 REG_S tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0)
25 REG_S s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)
26 REG_S s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0)
27 REG_S a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0)
28 REG_S a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0)
29 REG_S a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0)
30 REG_S a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0)
[all …]
A Dmcount-dyn.S31 REG_S a0, ABI_A0(sp)
32 REG_S a1, ABI_A1(sp)
33 REG_S a2, ABI_A2(sp)
34 REG_S a3, ABI_A3(sp)
35 REG_S a4, ABI_A4(sp)
36 REG_S a5, ABI_A5(sp)
37 REG_S a6, ABI_A6(sp)
38 REG_S a7, ABI_A7(sp)
39 REG_S t0, ABI_T0(sp)
40 REG_S ra, ABI_RA(sp)
[all …]
A Dentry.S23 REG_S a0, TASK_TI_A0(tp)
28 REG_S a1, TASK_TI_A1(tp)
134 REG_S x1, PT_RA(sp)
135 REG_S x3, PT_GP(sp)
136 REG_S x5, PT_T0(sp)
154 REG_S s0, PT_SP(sp)
156 REG_S s2, PT_EPC(sp)
159 REG_S s5, PT_TP(sp)
299 REG_S x1, PT_RA(sp)
310 REG_S s0, PT_SP(sp)
[all …]
A Dcopy-unaligned.S25 REG_S a4, 0(a0)
26 REG_S a5, SZREG(a0)
27 REG_S a6, 2*SZREG(a0)
28 REG_S a7, 3*SZREG(a0)
29 REG_S t0, 4*SZREG(a0)
30 REG_S t1, 5*SZREG(a0)
31 REG_S t2, 6*SZREG(a0)
32 REG_S t3, 7*SZREG(a0)
A Dmcount.S19 REG_S s0, 0*SZREG(sp)
20 REG_S ra, 1*SZREG(sp)
30 REG_S ra, FREGS_RA(sp)
31 REG_S s0, FREGS_S0(sp)
32 REG_S a0, FREGS_A0(sp)
33 REG_S a1, FREGS_A1(sp)
/arch/riscv/lib/
A Dmemset.S66 REG_S a1, 0(t0)
67 REG_S a1, SZREG(t0)
68 REG_S a1, 2*SZREG(t0)
69 REG_S a1, 3*SZREG(t0)
70 REG_S a1, 4*SZREG(t0)
71 REG_S a1, 5*SZREG(t0)
72 REG_S a1, 6*SZREG(t0)
73 REG_S a1, 7*SZREG(t0)
74 REG_S a1, 8*SZREG(t0)
75 REG_S a1, 9*SZREG(t0)
[all …]
A Dmemcpy.S53 REG_S a4, 0(t6)
54 REG_S a5, SZREG(t6)
55 REG_S a6, 2*SZREG(t6)
56 REG_S a7, 3*SZREG(t6)
57 REG_S t0, 4*SZREG(t6)
58 REG_S t1, 5*SZREG(t6)
59 REG_S t2, 6*SZREG(t6)
60 REG_S t3, 7*SZREG(t6)
61 REG_S t4, 8*SZREG(t6)
62 REG_S t5, 9*SZREG(t6)
[all …]
A Duaccess.S125 fixup REG_S a4, 0(a0), 10f
126 fixup REG_S a5, SZREG(a0), 10f
127 fixup REG_S a6, 2*SZREG(a0), 10f
128 fixup REG_S a7, 3*SZREG(a0), 10f
129 fixup REG_S t1, 4*SZREG(a0), 10f
130 fixup REG_S t2, 5*SZREG(a0), 10f
131 fixup REG_S t3, 6*SZREG(a0), 10f
132 fixup REG_S t4, 7*SZREG(a0), 10f
186 fixup REG_S a2, 0(a0), 10f
235 fixup REG_S, zero, (a0), 11f
A Dmemmove.S139 REG_S t2, ((0 * SZREG) - (2 * SZREG))(t3)
148 REG_S t2, ((1 * SZREG) - (2 * SZREG))(t3)
201 REG_S t2, ( 1 * SZREG)(t4)
210 REG_S t2, ( 0 * SZREG)(t4)
234 REG_S t1, (-1 * SZREG)(t3)
246 REG_S t1, ( 0 * SZREG)(t4)
/arch/riscv/kernel/probes/
A Drethook_trampoline.S14 REG_S x1, PT_RA(sp)
15 REG_S x3, PT_GP(sp)
16 REG_S x4, PT_TP(sp)
17 REG_S x5, PT_T0(sp)
18 REG_S x6, PT_T1(sp)
19 REG_S x7, PT_T2(sp)
20 REG_S x8, PT_S0(sp)
21 REG_S x9, PT_S1(sp)
22 REG_S x10, PT_A0(sp)
23 REG_S x11, PT_A1(sp)
[all …]
/arch/riscv/include/asm/
A Dasm.h129 REG_S x6, PT_T1(sp)
130 REG_S x7, PT_T2(sp)
131 REG_S x8, PT_S0(sp)
132 REG_S x9, PT_S1(sp)
133 REG_S x10, PT_A0(sp)
134 REG_S x11, PT_A1(sp)
135 REG_S x12, PT_A2(sp)
136 REG_S x13, PT_A3(sp)
137 REG_S x14, PT_A4(sp)
138 REG_S x15, PT_A5(sp)
[all …]
A Dassembler.h74 REG_S t0, 0(a0)
75 REG_S t1, SZREG(a0)
A Dscs.h35 REG_S gp, TASK_TI_SCS_SP(tp)
/arch/riscv/kvm/
A Dvcpu_switch.S16 REG_S ra, (KVM_ARCH_HOST_RA)(a0)
17 REG_S sp, (KVM_ARCH_HOST_SP)(a0)
18 REG_S gp, (KVM_ARCH_HOST_GP)(a0)
19 REG_S tp, (KVM_ARCH_HOST_TP)(a0)
20 REG_S s0, (KVM_ARCH_HOST_S0)(a0)
21 REG_S s1, (KVM_ARCH_HOST_S1)(a0)
22 REG_S a1, (KVM_ARCH_HOST_A1)(a0)
23 REG_S a2, (KVM_ARCH_HOST_A2)(a0)
24 REG_S a3, (KVM_ARCH_HOST_A3)(a0)
25 REG_S a4, (KVM_ARCH_HOST_A4)(a0)
[all …]
/arch/mips/fw/lib/
A Dcall_o32.S46 REG_S ra,O32_FRAMESZ-1*SZREG(sp)
47 REG_S fp,O32_FRAMESZ-2*SZREG(sp)
48 REG_S gp,O32_FRAMESZ-3*SZREG(sp)
49 REG_S s7,O32_FRAMESZ-4*SZREG(sp)
50 REG_S s6,O32_FRAMESZ-5*SZREG(sp)
51 REG_S s5,O32_FRAMESZ-6*SZREG(sp)
52 REG_S s4,O32_FRAMESZ-7*SZREG(sp)
53 REG_S s3,O32_FRAMESZ-8*SZREG(sp)
54 REG_S s2,O32_FRAMESZ-9*SZREG(sp)
55 REG_S s1,O32_FRAMESZ-10*SZREG(sp)
[all …]
/arch/riscv/kernel/vdso/
A Dvgetrandom-chacha.S84 REG_S s0, (sp)
85 REG_S s1, SZREG(sp)
86 REG_S s2, 2*SZREG(sp)
87 REG_S s3, 3*SZREG(sp)
88 REG_S s4, 4*SZREG(sp)
89 REG_S s5, 5*SZREG(sp)
90 REG_S s6, 6*SZREG(sp)
91 REG_S s7, 7*SZREG(sp)
92 REG_S s8, 8*SZREG(sp)
93 REG_S s9, 9*SZREG(sp)
[all …]
/arch/loongarch/vdso/
A Dvgetrandom-chacha.S86 REG_S s0, sp, 0
87 REG_S s1, sp, SZREG
88 REG_S s2, sp, SZREG * 2
89 REG_S s3, sp, SZREG * 3
90 REG_S s4, sp, SZREG * 4
91 REG_S s5, sp, SZREG * 5
92 REG_S s6, sp, SZREG * 6
93 REG_S s7, sp, SZREG * 7
94 REG_S s8, sp, SZREG * 8
95 REG_S s9, sp, SZREG * 9
/arch/mips/mm/
A Dtlbex-fault.S20 REG_S a2, PT_BVADDR(sp)
/arch/riscv/errata/sifive/
A Derrata_cip_453.S20 REG_S \badaddr, PT_BADADDR(\pt_reg)
/arch/loongarch/include/asm/
A Dasm.h56 #define REG_S st.w macro
61 #define REG_S st.d macro
/arch/mips/include/asm/
A Dasm.h158 #define REG_S sw macro
164 #define REG_S sd macro
/arch/loongarch/kernel/
A Drelocate_kernel.S70 REG_S s4, s3, 0
/arch/mips/power/
A Dhibernate_asm.S39 REG_S t8, (t2)
/arch/loongarch/power/
A Dhibernate_asm.S43 REG_S t8, t2, 0

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