| /arch/arm64/boot/dts/marvell/ |
| A D | armada-8020.dtsi | 12 /* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock
14 * disable it. However, the RTC clock in CP slave is connected to the
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| A D | armada-8040.dtsi | 20 /* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock
22 * disable it. However, the RTC clock in CP slave is connected to the
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| /arch/sh/kernel/cpu/sh3/ |
| A D | setup-sh7705.c | 31 RTC, WDT, REF_RCMI, enumerator
49 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
50 INTC_VECT(RTC, 0x4c0),
56 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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| A D | setup-sh7710.c | 28 RTC, WDT, REF, enumerator
51 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
52 INTC_VECT(RTC, 0x4c0),
58 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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| A D | setup-sh770x.c | 32 RTC, WDT, REF, enumerator
38 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
39 INTC_VECT(RTC, 0x4c0),
68 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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| A D | setup-sh7720.c | 223 TMU0, TMU1, TMU2, RTC, enumerator
239 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC, 0x480),
240 INTC_VECT(RTC, 0x4a0), INTC_VECT(RTC, 0x4c0),
267 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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| /arch/sh/boards/mach-highlander/ |
| A D | irq-r7780mp.c | 23 RTC, /* RTC Alarm */ enumerator
37 INTC_IRQ(RTC, IRQ_RTC),
48 { SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS,
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| A D | irq-r7785rp.c | 21 RTC, /* RTC Alarm */ enumerator
33 INTC_IRQ(RTC, IRQ_RTC),
48 RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } },
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| /arch/arm/boot/dts/marvell/ |
| A D | kirkwood-nas2big.dts | 31 /* The on-chip RTC is not powered (no supercap). */
92 * An external I2C RTC (Dallas DS1337S+) is used. This allows
93 * to power-up the board on an RTC alarm. The external RTC can
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| /arch/arm/boot/dts/nxp/imx/ |
| A D | imx6qdl-tx6-mb7.dtsi | 43 * The backup voltage of the module internal RTC is not wired
44 * by default on the MB7, so disable that RTC chip.
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| A D | imx6dl-dhcom-picoitx.dts | 6 * DHCM-iMX6DL-C080-R102-F0819-E-SD-RTC-T-HS-I-01D2
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| A D | imx6dl-dhcom-pdk2.dts | 6 * DHCM-iMX6DL-C080-R102-F0819-E-SD-RTC-T-HS-I-01D2
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| A D | imx6q-dhcom-pdk2.dts | 7 * DHCM-iMX6Q-C080-R102-F0819-E-SD-RTC-T-HS-I-01D2
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| /arch/sh/kernel/cpu/sh4/ |
| A D | setup-sh7750.c | 185 TMU3, TMU4, TMU0, TMU1, TMU2, RTC, SCI1, SCIF, WDT, REF, enumerator
195 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
196 INTC_VECT(RTC, 0x4c0),
206 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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| /arch/sh/kernel/cpu/sh2a/ |
| A D | setup-sh7203.c | 37 ROMDEC, FLCTL, SDHI, RTC, RCAN0, RCAN1, enumerator
107 INTC_IRQ(RTC, 231), INTC_IRQ(RTC, 232),
108 INTC_IRQ(RTC, 233),
155 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } },
160 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } },
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| A D | setup-sh7201.c | 28 RTC, WDT, enumerator
88 INTC_IRQ(RTC, 152), INTC_IRQ(RTC, 153),
89 INTC_IRQ(RTC, 154),
159 { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
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| A D | setup-sh7264.c | 42 NFMC, SDHI, RTC, enumerator
163 INTC_IRQ(RTC, 296), INTC_IRQ(RTC, 297),
164 INTC_IRQ(RTC, 298),
213 { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } },
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| A D | setup-sh7269.c | 46 RTC, enumerator
180 INTC_IRQ(RTC, 338), INTC_IRQ(RTC, 339),
181 INTC_IRQ(RTC, 340),
235 { 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } },
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| /arch/sh/kernel/cpu/sh4a/ |
| A D | setup-sh7763.c | 240 RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator
254 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
255 INTC_VECT(RTC, 0x4c0),
306 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
317 { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },
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| A D | setup-sh7780.c | 304 RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator
315 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
316 INTC_VECT(RTC, 0x4c0),
360 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
366 { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },
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| A D | setup-sh7734.c | 324 RTC, enumerator
413 INTC_VECT(RTC, 0xC00),
492 RTC,
503 { TMU30, TMU60, RTC, SDHI } },
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| /arch/arm/boot/dts/allwinner/ |
| A D | sun8i-v3s-anbernic-rg-nano.dts | 191 /* DCDC3 wired into every 3.3v input that isn't the RTC. */
199 /* LDO1 wired into RTC, voltage is hard-wired at 3.3v. */
222 /* RTC uses internal oscillator */
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| /arch/arm/boot/dts/st/ |
| A D | stm32mp157c-dhcom-pdk2.dts | 6 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E2-CAN2-SDR104-RTC-WBT-T-DSI-I-01D2
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| A D | stm32mp157c-dhcom-picoitx.dts | 6 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E-CAN2-SD-RTC-T-DSI-I-01D2
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| /arch/arc/boot/dts/ |
| A D | skeleton_hs.dtsi | 33 /* 64-bit Local RTC: preferred clocksource for UP */
|