Searched refs:RVC_RS1S (Results 1 – 2 of 2) sorted by relevance
| /arch/riscv/kernel/ |
| A D | traps_misaligned.c | 132 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) macro
150 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
|
| /arch/riscv/kvm/ |
| A D | vcpu_insn.c | 110 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) macro
130 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
|
Completed in 9 milliseconds