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Searched refs:RX (Results 1 – 25 of 136) sorted by relevance

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/arch/arc/lib/
A Dmemcpy-archs.S9 # define SHIFT_1(RX,RY,IMM) asl RX, RY, IMM ; << argument
10 # define SHIFT_2(RX,RY,IMM) lsr RX, RY, IMM ; >> argument
11 # define MERGE_1(RX,RY,IMM) asl RX, RY, IMM argument
13 # define EXTRACT_1(RX,RY,IMM) and RX, RY, 0xFFFF argument
14 # define EXTRACT_2(RX,RY,IMM) lsr RX, RY, IMM argument
16 # define SHIFT_1(RX,RY,IMM) lsr RX, RY, IMM ; >> argument
20 # define EXTRACT_1(RX,RY,IMM) lsr RX, RY, IMM argument
25 # define LOADX(DST,RX) ldd.ab DST, [RX, 8] argument
26 # define STOREX(SRC,RX) std.ab SRC, [RX, 8] argument
30 # define LOADX(DST,RX) ld.ab DST, [RX, 4] argument
[all …]
A Dmemcpy-archs-unaligned.S12 # define LOADX(DST,RX) ldd.ab DST, [RX, 8] argument
13 # define STOREX(SRC,RX) std.ab SRC, [RX, 8] argument
17 # define LOADX(DST,RX) ld.ab DST, [RX, 4] argument
18 # define STOREX(SRC,RX) st.ab SRC, [RX, 4] argument
/arch/x86/crypto/
A Dcast5-avx-x86_64-asm_64.S46 #define RX %xmm8 macro
136 vpxor a1, RX, a1; \
247 inpack_blocks(RL1, RR1, RTMP, RX, RKM);
248 inpack_blocks(RL2, RR2, RTMP, RX, RKM);
249 inpack_blocks(RL3, RR3, RTMP, RX, RKM);
250 inpack_blocks(RL4, RR4, RTMP, RX, RKM);
320 inpack_blocks(RL1, RR1, RTMP, RX, RKM);
321 inpack_blocks(RL2, RR2, RTMP, RX, RKM);
465 vmovq (%r12), RX;
466 vpshufd $0x4f, RX, RX;
[all …]
A Dcast6-avx-x86_64-asm_64.S47 #define RX %xmm8 macro
130 F_head(b1, RX, RGI1, RGI2, op0); \
131 F_head(b2, RX, RGI3, RGI4, op0); \
133 F_tail(b1, RX, RGI1, RGI2, op1, op2, op3); \
136 vpxor a1, RX, a1; \
269 inpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
270 inpack_blocks(RA2, RB2, RC2, RD2, RTMP, RX, RKRF, RKM);
293 outunpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
294 outunpack_blocks(RA2, RB2, RC2, RD2, RTMP, RX, RKRF, RKM);
317 inpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
[all …]
/arch/arm64/boot/dts/amlogic/
A Dmeson-gxbb-nanopi-k2.dts240 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
251 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
252 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
253 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
289 "Bluetooth UART TX", "Bluetooth UART RX",
A Dmeson-gxbb-odroidc2.dts283 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
294 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
295 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
296 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
A Dmeson-gxl-s905x-khadas-vim.dts156 "UART RX",
202 "Bluetooth UART TX", "Bluetooth UART RX",
/arch/riscv/boot/dts/starfive/
A Djh7100-starfive-visionfive-v1.dts27 * manual adjustment of the RX internal delay to work properly. The default
28 * RX delay provided by the driver (1.95ns) is too high, but applying a 50%
/arch/arm/boot/dts/nxp/imx/
A Dimx6ull-dhcom-drc02.dts23 * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins.
55 * GPIO line, however the i.MX6ULL UART driver assumes RX happens
57 * line. Hence, the RX is always enabled here.
A Dimx6qdl-dhcom-drc02.dtsi26 * GPIO line, however the i.MX6 UART driver assumes RX happens
28 * line. Hence, the RX is always enabled here.
/arch/arm/boot/dts/microchip/
A Dsama5d3_can.dtsi19 …<AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1…
27 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
A Dlan966x-pcb8291.dts62 /* RX, TX */
68 /* RX, TX */
/arch/arm/boot/dts/ti/omap/
A Domap2430.dtsi181 <60>, /* RX interrupt */
182 <61>; /* RX overflow interrupt */
198 <63>; /* RX interrupt */
214 <90>; /* RX interrupt */
230 <55>; /* RX interrupt */
246 <82>; /* RX interrupt */
A Dam335x-netcom-plus-2xx.dts23 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0) /* RX */
36 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* RX */
A Domap2420.dtsi156 <60>; /* RX interrupt */
170 <63>; /* RX interrupt */
/arch/arm64/boot/dts/renesas/
A Drzg2ul-smarc-pinfunction.dtsi17 <RZG2L_PORT_PINMUX(1, 2, 3)>; /* RX */
31 <RZG2L_PORT_PINMUX(2, 1, 3)>; /* RX */
A Drzg2l-smarc-pinfunction.dtsi17 <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
30 <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
A Dr9a09g047e57-smarc.dts118 pinmux = <RZG3E_PORT_PINMUX(L, 2, 3)>, /* RX */
123 pinmux = <RZG3E_PORT_PINMUX(5, 2, 3)>, /* RX */
/arch/arm64/boot/dts/amd/
A Damd-seattle-xgbe-b.dtsi12 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */
38 <0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */
/arch/arm/boot/dts/marvell/
A Dkirkwood-blackarmor-nas220.dts98 * pin 4 - RX (CPU's RX)
/arch/arm/boot/dts/st/
A Dstm32mp15xx-dhcom-drc02.dtsi20 * GPIO line, however the STM32 UART driver assumes RX happens
22 * line. Hence, the RX is always enabled here.
A Dstm32mp135f-dhcor-dhsbc.dts264 &m_can1 { /* Expansion connector: TX:pin16 RX:pin18 */
271 &m_can2 { /* Expansion connector: TX:pin22 RX:pin26 */
353 &usart1 { /* Expansion connector: RX:pin33 TX:pin37 */
361 &usart2 { /* Expansion connector: RX:pin10 TX:pin8 RTS:pin11 CTS:pin36 */
/arch/arm/boot/dts/samsung/
A Dexynos5422-odroidxu3-audio.dtsi29 "Mixer DAI RX", "HiFi Capture";
/arch/arm64/boot/dts/qcom/
A Dsm8750-mtp.dts960 /* WCD9395 RX */
966 * WCD9395 RX Port 1 (HPH_L/R) <=> SWR1 Port 1 (HPH_L/R)
967 * WCD9395 RX Port 2 (CLSH) <=> SWR1 Port 2 (CLSH)
968 * WCD9395 RX Port 3 (COMP_L/R) <=> SWR1 Port 3 (COMP_L/R)
969 * WCD9395 RX Port 4 (LO) <=> SWR1 Port 4 (LO)
970 * WCD9395 RX Port 5 (DSD_L/R) <=> SWR1 Port 5 (DSD_L/R)
971 * WCD9395 RX Port 6 (HIFI_PCM_L/R) <=> SWR1 Port 9 (HIFI_PCM_L/R)
/arch/arm/boot/dts/intel/socfpga/
A Dsocfpga_cyclone5_de10nano.dts90 * RX = TRACE_D0/SPIS0_CLK/UART0_RX/HPS_GPIO49

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