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Searched refs:SMB_CSR (Results 1 – 2 of 2) sorted by relevance

/arch/mips/sibyte/swarm/
A Drtc_m41t81.c81 #define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg)) macro
88 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); in m41t81_read()
90 SMB_CSR(R_SMB_START)); in m41t81_read()
96 SMB_CSR(R_SMB_START)); in m41t81_read()
103 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in m41t81_read()
107 return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff; in m41t81_read()
115 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); in m41t81_write()
116 __raw_writeq(b & 0xff, SMB_CSR(R_SMB_DATA)); in m41t81_write()
118 SMB_CSR(R_SMB_START)); in m41t81_write()
125 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in m41t81_write()
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A Drtc_xicor1241.c56 #define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg)) macro
60 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_read()
63 __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD)); in xicor_read()
64 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA)); in xicor_read()
66 SMB_CSR(R_SMB_START)); in xicor_read()
72 SMB_CSR(R_SMB_START)); in xicor_read()
79 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in xicor_read()
83 return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff; in xicor_read()
91 __raw_writeq(addr, SMB_CSR(R_SMB_CMD)); in xicor_write()
94 SMB_CSR(R_SMB_START)); in xicor_write()
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