Searched refs:SPR_DCCFGR_CBS (Results 1 – 3 of 3) sorted by relevance
47 cpuinfo->dcache.block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7); in init_cache_level()
915 l.andi r26,r24,SPR_DCCFGR_CBS
322 #define SPR_DCCFGR_CBS 0x00000080 macro
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