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Searched refs:STR (Results 1 – 16 of 16) sorted by relevance

/arch/mips/include/asm/
A Dunaligned-emul.h23 STR(PTR_WD)"\t1b, 4b\n\t" \
24 STR(PTR_WD)"\t2b, 4b\n\t" \
77 STR(PTR_WD)"\t1b, 11b\n\t" \
78 STR(PTR_WD)"\t2b, 11b\n\t" \
79 STR(PTR_WD)"\t3b, 11b\n\t" \
80 STR(PTR_WD)"\t4b, 11b\n\t" \
181 STR(PTR_WD)"\t1b, 11b\n\t" \
182 STR(PTR_WD)"\t2b, 11b\n\t" \
183 STR(PTR_WD)"\t3b, 11b\n\t" \
184 STR(PTR_WD)"\t4b, 11b\n\t" \
[all …]
A Dftrace.h35 STR(PTR_WD) "\t1b, 3b\n\t" \
57 STR(PTR_WD) "\t1b, 3b\n\t" \
67 safe_load(STR(lw), src, dst, error)
69 safe_store(STR(sw), src, dst, error)
72 safe_load(STR(PTR_L), src, dst, error)
75 safe_store(STR(PTR_S), src, dst, error)
A Dr4kcache.h126 " "STR(PTR_WD)" 1b, 3b \n" \
149 " "STR(PTR_WD)" 1b, 3b \n" \
A Dmipsregs.h28 #ifndef STR
29 #define STR(x) __STR(x) macro
2541 " cfc1 %0,"STR(source)" \n" \
2553 " ctc1 %0,"STR(dest)" \n" \
/arch/mips/include/asm/octeon/
A Dcrypto.h34 "dmtc2 %[rt],0x0048+" STR(index) \
47 "dmfc2 %[rt],0x0048+" STR(index) \
60 "dmtc2 %[rt],0x0040+" STR(index) \
108 "dmtc2 %[rt],0x0250+" STR(index) \
121 "dmfc2 %[rt],0x0250+" STR(index) \
134 "dmtc2 %[rt],0x0240+" STR(index) \
182 "dmtc2 %[rt],0x0250+" STR(index) \
195 "dmfc2 %[rt],0x0250+" STR(index) \
208 "dmtc2 %[rt],0x0240+" STR(index) \
/arch/mips/kernel/
A Dmips-r2-to-r6-emul.c1261 STR(PTR_WD) " 1b,8b\n" in mipsr2_decoder()
1262 STR(PTR_WD) " 2b,8b\n" in mipsr2_decoder()
1263 STR(PTR_WD) " 3b,8b\n" in mipsr2_decoder()
1264 STR(PTR_WD) " 4b,8b\n" in mipsr2_decoder()
1336 STR(PTR_WD) " 1b,8b\n" in mipsr2_decoder()
1337 STR(PTR_WD) " 2b,8b\n" in mipsr2_decoder()
1338 STR(PTR_WD) " 3b,8b\n" in mipsr2_decoder()
1339 STR(PTR_WD) " 4b,8b\n" in mipsr2_decoder()
1407 STR(PTR_WD) " 1b,8b\n" in mipsr2_decoder()
1408 STR(PTR_WD) " 2b,8b\n" in mipsr2_decoder()
[all …]
A Dsyscall.c126 " "STR(PTR_WD)" 1b, 4b \n" in mips_atomic_set()
127 " "STR(PTR_WD)" 2b, 4b \n" in mips_atomic_set()
156 " "STR(PTR_WD)" 1b, 5b \n" in mips_atomic_set()
157 " "STR(PTR_WD)" 2b, 5b \n" in mips_atomic_set()
/arch/x86/kernel/
A Dmachine_kexec_32.c29 #define STR(X) __STR(X) in load_segments() macro
32 "\tljmp $"STR(__KERNEL_CS)",$1f\n" in load_segments()
34 "\tmovl $"STR(__KERNEL_DS)",%%eax\n" in load_segments()
39 #undef STR in load_segments()
/arch/mips/include/asm/vdso/
A Dvdso.h53 " " STR(PTR_ADDU) " %0, $31, %0 \n" in get_vdso_time_data()
/arch/m68k/include/asm/
A Dentry.h244 #define STR(X) STR1(X)
255 "andw #-"STR(THREAD_SIZE)","#tmp"\n\t" \
/arch/parisc/include/asm/
A Dunistd.h149 #undef STR
/arch/powerpc/kernel/ptrace/
A Dptrace-view.c15 #define STR(s) #s /* convert to string */ macro
18 {.name = STR(r##num), .offset = offsetof(struct pt_regs, gpr[num])}, \
19 {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
/arch/arm/boot/dts/nxp/vf/
A Dvf610-zii-dev.dtsi196 * Attached MT25QL02 can go up to 90Mhz in DTR and 166 in STR
/arch/x86/lib/
A Dx86-opcode-map.txt1176 1: STR Rv/Mw
/arch/arm/
A DKconfig785 - Cortex-A12 818325: Execution of an UNPREDICTABLE STR or STM
/arch/x86/
A DKconfig1744 issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are

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