| /arch/riscv/lib/ |
| A D | memset.S | 22 addi a3, t0, SZREG-1
23 andi a3, a3, ~(SZREG-1)
46 andi a4, a2, ~(SZREG-1)
67 REG_S a1, SZREG(t0)
68 REG_S a1, 2*SZREG(t0)
69 REG_S a1, 3*SZREG(t0)
70 REG_S a1, 4*SZREG(t0)
71 REG_S a1, 5*SZREG(t0)
72 REG_S a1, 6*SZREG(t0)
73 REG_S a1, 7*SZREG(t0)
[all …]
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| A D | memcpy.S | 17 andi a3, t6, SZREG-1
18 andi a4, a1, SZREG-1
27 addi a3, a3, SZREG
44 REG_L a5, SZREG(a1)
45 REG_L a6, 2*SZREG(a1)
46 REG_L a7, 3*SZREG(a1)
47 REG_L t0, 4*SZREG(a1)
48 REG_L t1, 5*SZREG(a1)
49 REG_L t2, 6*SZREG(a1)
50 REG_L t3, 7*SZREG(a1)
[all …]
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| A D | memmove.S | 61 andi t0, a2, -(2 * SZREG)
67 andi t5, t3, -SZREG
68 andi t6, t4, -SZREG
79 addi t5, t5, SZREG
88 andi t1, t0, (SZREG - 1)
139 REG_S t2, ((0 * SZREG) - (2 * SZREG))(t3)
148 REG_S t2, ((1 * SZREG) - (2 * SZREG))(t3)
232 addi a1, a1, SZREG
233 addi t3, t3, SZREG
244 addi a4, a4, -SZREG
[all …]
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| A D | uaccess.S | 84 addi t1, a0, SZREG-1
85 andi t1, t1, ~(SZREG-1)
104 andi a3, a1, SZREG-1
133 addi a0, a0, 8*SZREG
134 addi a1, a1, 8*SZREG
156 andi t1, t0, ~(SZREG-1)
166 li a5, SZREG*8
183 addi a1, a1, SZREG
187 addi a0, a0, SZREG
224 addi t0, a0, SZREG-1
[all …]
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| A D | strlen.S | 63 andi t2, a0, SZREG-1
66 andi t0, a0, -SZREG
68 li t3, SZREG
102 addi t2, t0, SZREG
111 REG_L t1, SZREG(t0)
112 addi t0, t0, SZREG
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| A D | strncmp.S | 71 and t2, t2, SZREG-1
76 andi t6, t4, -SZREG
88 addi a0, a0, SZREG
89 addi a1, a1, SZREG
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| A D | strcmp.S | 67 and t2, t2, SZREG-1
77 addi a0, a0, SZREG
78 addi a1, a1, SZREG
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| /arch/mips/fw/lib/ |
| A D | call_o32.S | 20 #define O32_STATSZ (SZREG * O32_STATC)
22 #define O32_SPSZ SZREG
46 REG_S ra,O32_FRAMESZ-1*SZREG(sp)
47 REG_S fp,O32_FRAMESZ-2*SZREG(sp)
48 REG_S gp,O32_FRAMESZ-3*SZREG(sp)
49 REG_S s7,O32_FRAMESZ-4*SZREG(sp)
50 REG_S s6,O32_FRAMESZ-5*SZREG(sp)
51 REG_S s5,O32_FRAMESZ-6*SZREG(sp)
52 REG_S s4,O32_FRAMESZ-7*SZREG(sp)
53 REG_S s3,O32_FRAMESZ-8*SZREG(sp)
[all …]
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| /arch/riscv/kernel/ |
| A D | copy-unaligned.S | 18 REG_L a5, SZREG(a1)
19 REG_L a6, 2*SZREG(a1)
20 REG_L a7, 3*SZREG(a1)
21 REG_L t0, 4*SZREG(a1)
22 REG_L t1, 5*SZREG(a1)
23 REG_L t2, 6*SZREG(a1)
24 REG_L t3, 7*SZREG(a1)
26 REG_S a5, SZREG(a0)
27 REG_S a6, 2*SZREG(a0)
28 REG_S a7, 3*SZREG(a0)
[all …]
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| A D | mcount.S | 19 REG_S s0, 0*SZREG(sp)
20 REG_S ra, 1*SZREG(sp)
38 REG_L ra, 1*SZREG(sp)
39 REG_L s0, 0*SZREG(sp)
106 addi a0, s0, -SZREG
109 REG_L a2, -2*SZREG(s0)
122 REG_L a1, -SZREG(s0)
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| /arch/riscv/kernel/vdso/ |
| A D | vgetrandom-chacha.S | 83 addi sp, sp, -12*SZREG
85 REG_S s1, SZREG(sp)
86 REG_S s2, 2*SZREG(sp)
87 REG_S s3, 3*SZREG(sp)
88 REG_S s4, 4*SZREG(sp)
89 REG_S s5, 5*SZREG(sp)
90 REG_S s6, 6*SZREG(sp)
91 REG_S s7, 7*SZREG(sp)
92 REG_S s8, 8*SZREG(sp)
93 REG_S s9, 9*SZREG(sp)
[all …]
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| /arch/loongarch/vdso/ |
| A D | vgetrandom-chacha.S | 87 REG_S s1, sp, SZREG
88 REG_S s2, sp, SZREG * 2
89 REG_S s3, sp, SZREG * 3
90 REG_S s4, sp, SZREG * 4
91 REG_S s5, sp, SZREG * 5
92 REG_S s6, sp, SZREG * 6
93 REG_S s7, sp, SZREG * 7
94 REG_S s8, sp, SZREG * 8
95 REG_S s9, sp, SZREG * 9
241 REG_L s1, sp, SZREG
[all …]
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| /arch/loongarch/kernel/ |
| A D | relocate_kernel.S | 36 PTR_ADDI s0, s0, SZREG
65 li.w s5, (1 << _PAGE_SHIFT) / SZREG
71 PTR_ADDI s3, s3, SZREG
72 PTR_ADDI s1, s1, SZREG
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| A D | mcount.S | 16 #define MCOUNT_RA_OFFSET (SZREG)
17 #define MCOUNT_STACK_SIZE (2 * SZREG)
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| A D | process.c | 263 if (nextsp & (SZREG - 1)) in in_irq_stack()
296 if (!stack || stack & (SZREG - 1)) in get_stack_info()
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| /arch/riscv/include/asm/ |
| A D | assembler.h | 72 REG_L t1, SZREG(a1)
75 REG_S t1, SZREG(a0)
77 addi a0, a0, 2 * SZREG
78 addi a1, a1, 2 * SZREG
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| A D | asm.h | 28 #define SZREG __REG_SEL(8, 4) macro
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| /arch/mips/kernel/ |
| A D | relocate_kernel.S | 27 PTR_ADDIU s0, s0, SZREG
58 li s6, (1 << _PAGE_SHIFT) / SZREG
64 PTR_ADDIU s4, s4, SZREG
65 PTR_ADDIU s2, s2, SZREG
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| A D | head.S | 121 PTR_SUBU sp, 4 * SZREG # init stack pointer
131 PTR_SUBU sp, 4 * SZREG # init stack pointer
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| /arch/loongarch/include/asm/ |
| A D | asm.h | 45 #define SZREG 4 macro
47 #define SZREG 8 macro
54 #if (SZREG == 4)
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| /arch/mips/power/ |
| A D | hibernate_asm.S | 40 PTR_ADDIU t1, t1, SZREG
41 PTR_ADDIU t2, t2, SZREG
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| /arch/loongarch/power/ |
| A D | hibernate_asm.S | 44 PTR_ADDI t1, t1, SZREG
45 PTR_ADDI t2, t2, SZREG
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| /arch/mips/include/asm/ |
| A D | asm.h | 148 #define SZREG 8 macro
150 #define SZREG 4 macro
|