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Searched refs:WDT (Results 1 – 21 of 21) sorted by relevance

/arch/sh/kernel/cpu/sh3/
A Dsetup-sh7705.c31 RTC, WDT, REF_RCMI, enumerator
51 INTC_VECT(WDT, 0x560),
57 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
A Dsetup-sh7710.c28 RTC, WDT, REF, enumerator
53 INTC_VECT(WDT, 0x560),
59 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
A Dsetup-sh770x.c32 RTC, WDT, REF, enumerator
42 INTC_VECT(WDT, 0x560),
69 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
A Dsetup-sh7720.c224 WDT, REF_RCMI, SIM, enumerator
243 INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580),
268 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
/arch/sh/kernel/cpu/sh2/
A Dsetup-sh7619.c22 WDT, EDMAC, CMT0, CMT1, enumerator
34 INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
51 { 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
/arch/sh/kernel/cpu/sh4/
A Dsetup-sh7750.c185 TMU3, TMU4, TMU0, TMU1, TMU2, RTC, SCI1, SCIF, WDT, REF, enumerator
201 INTC_VECT(WDT, 0x560),
207 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } },
A Dsetup-sh7760.c37 WDT, REF, enumerator
74 INTC_VECT(WDT, 0x560),
105 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
/arch/sh/kernel/cpu/sh2a/
A Dsetup-sh7206.c30 CMT0, CMT1, BSC, WDT, enumerator
61 INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
112 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
A Dsetup-sh7201.c28 RTC, WDT, enumerator
91 INTC_IRQ(WDT, 156),
159 { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
A Dsetup-sh7203.c22 USB, LCDC, CMT0, CMT1, BSC, WDT, enumerator
63 INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145),
144 { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
A Dsetup-sh7264.c25 USB, VDC3, CMT0, CMT1, BSC, WDT, enumerator
81 INTC_IRQ(BSC, 177), INTC_IRQ(WDT, 178),
201 { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
A Dsetup-sh7269.c26 USB, VDC4, CMT0, CMT1, BSC, WDT, enumerator
90 INTC_IRQ(BSC, 190), INTC_IRQ(WDT, 191),
219 { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { CMT0, CMT1, BSC, WDT } },
/arch/sh/kernel/cpu/sh4a/
A Dsetup-sh7763.c240 RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator
256 INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580),
306 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
318 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
A Dsetup-sh7780.c304 RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator
317 INTC_VECT(WDT, 0x560),
360 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
367 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
A Dsetup-sh7785.c377 WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator
393 INTC_VECT(WDT, 0x560),
455 PCIINTA, PCISERR, HAC1, HAC0, DMAC1, DMAC0, HUDI, WDT,
467 { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { SCIF4, SCIF5, WDT, } },
A Dsetup-sh7786.c460 WDT, enumerator
492 INTC_VECT(WDT, 0x3e0),
572 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WDT },
604 { 0xfe410800, 0, 32, 8, /* INT2PRI0 */ { 0, 0, 0, WDT } },
/arch/arm64/boot/dts/xilinx/
A Dxlnx-zynqmp-clk.h87 #define WDT 75 macro
A Dzynqmp-clk-ccf.dtsi281 clocks = <&zynqmp_clk WDT>;
/arch/arc/kernel/
A Dentry-arcv2.S50 VECTOR handle_interrupt ; unused (WDT)
/arch/arm64/boot/dts/freescale/
A Dimx8mm-data-modul-edm-sbc.dts902 /* WDOG_EN -- ungate WDT RESET# signal propagation */
A Dimx8mp-data-modul-edm-sbc.dts1096 /* WDOG_EN -- ungate WDT RESET# signal propagation */

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