Searched refs:X86_CR0_WP (Results 1 – 12 of 12) sorted by relevance
64 #define X86_CR0_WP _BITUL(X86_CR0_WP_BIT) macro178 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
7 #define KVM_POSSIBLE_CR0_GUEST_BITS (X86_CR0_TS | X86_CR0_WP)
43 #define KVM_MMU_CR0_ROLE_BITS (X86_CR0_PG | X86_CR0_WP)
1110 if ((cr0 ^ old_cr0) == X86_CR0_WP) { in kvm_post_set_cr0()
117 andl $~(X86_CR0_PG | X86_CR0_AM | X86_CR0_WP | X86_CR0_TS | X86_CR0_EM), %eax
181 andq $~(X86_CR0_AM | X86_CR0_WP | X86_CR0_TS | X86_CR0_EM), %rax
649 bits &= ~X86_CR0_WP; in vmx_l1_guest_owned_cr0_bits()
3286 hw_cr0 |= X86_CR0_WP; in vmx_set_cr0()
418 if (unlikely((val & X86_CR0_WP) != X86_CR0_WP)) { in native_write_cr0()419 bits_missing = X86_CR0_WP; in native_write_cr0()
135 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
207 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP);5631 const bool cr0_wp = kvm_is_cr0_bit_set(vcpu, X86_CR0_WP); in __kvm_mmu_refresh_passthrough_bits()5633 BUILD_BUG_ON((KVM_MMU_CR0_ROLE_BITS & KVM_POSSIBLE_CR0_GUEST_BITS) != X86_CR0_WP); in __kvm_mmu_refresh_passthrough_bits()
1768 hcr0 |= X86_CR0_PG | X86_CR0_WP; in svm_set_cr0()
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