Home
last modified time | relevance | path

Searched refs:__c (Results 1 – 15 of 15) sorted by relevance

/arch/parisc/include/asm/
A Dbarrier.h36 union { typeof(*p) __val; char __c[1]; } __u = \
42 : : "r"(*(__u8 *)__u.__c), "r"(__p) \
47 : : "r"(*(__u16 *)__u.__c), "r"(__p) \
52 : : "r"(*(__u32 *)__u.__c), "r"(__p) \
58 : : "r"(*(__u64 *)__u.__c), "r"(__p) \
66 union { typeof(*p) __val; char __c[1]; } __u; \
72 : "=r"(*(__u8 *)__u.__c) : "r"(__p) \
77 : "=r"(*(__u16 *)__u.__c) : "r"(__p) \
82 : "=r"(*(__u32 *)__u.__c) : "r"(__p) \
88 : "=r"(*(__u64 *)__u.__c) : "r"(__p) \
/arch/arm64/include/asm/
A Dbarrier.h133 union { __unqual_scalar_typeof(*p) __val; char __c[1]; } __u = \
141 : "rZ" (*(__u8 *)__u.__c) \
147 : "rZ" (*(__u16 *)__u.__c) \
153 : "rZ" (*(__u32 *)__u.__c) \
159 : "rZ" (*(__u64 *)__u.__c) \
167 union { __unqual_scalar_typeof(*p) __val; char __c[1]; } __u; \
174 : "=r" (*(__u8 *)__u.__c) \
179 : "=r" (*(__u16 *)__u.__c) \
184 : "=r" (*(__u32 *)__u.__c) \
189 : "=r" (*(__u64 *)__u.__c) \
A Drwonce.h36 union { __unqual_scalar_typeof(*__x) __val; char __c[1]; } __u; \
40 : "=r" (*(__u8 *)__u.__c) \
45 : "=r" (*(__u16 *)__u.__c) \
50 : "=r" (*(__u32 *)__u.__c) \
55 : "=r" (*(__u64 *)__u.__c) \
A Dcpuidle.h15 #define arm_cpuidle_save_irq_context(__c) \ argument
17 struct arm_cpuidle_irq_context *c = __c; \
27 #define arm_cpuidle_restore_irq_context(__c) \ argument
29 struct arm_cpuidle_irq_context *c = __c; \
A Dkvm_nested.h345 u32 __c = (c); \
346 BUG_ON(__c >= NR_CPUS); \
347 (FIX_VNCR - __c); \
/arch/arm/include/asm/
A Ddcc.h18 char __c; in __dcc_getchar() local
21 : "=r" (__c)); in __dcc_getchar()
24 return __c; in __dcc_getchar()
/arch/loongarch/include/asm/
A Dbarrier.h108 union { typeof(p) __val; char __c[1]; } __u = \
113 *(volatile __u8 *)&p = *(__u8 *)__u.__c; \
117 *(volatile __u16 *)&p = *(__u16 *)__u.__c; \
124 : [val] "r" (*(__u32 *)__u.__c) \
131 : [val] "r" (*(__u64 *)__u.__c) \
A Dstring.h9 extern void *memset(void *__s, int __c, size_t __count);
10 extern void *__memset(void *__s, int __c, size_t __count);
/arch/m68k/include/asm/
A Dbootstd.h91 register long __c __asm__ ("%d3") = (long)c; \
95 "d" (__c) \
106 register long __c __asm__ ("%d3") = (long)c; \
111 "d" (__c), "d" (__d) \
122 register long __c __asm__ ("%d3") = (long)c; \
128 "d" (__c), "d" (__d), "d" (__e) \
/arch/riscv/include/asm/
A Dkvm_nacl.h103 unsigned long __c = SBI_NACL_SHMEM_HFENCE_CONFIG_PEND; \
104 __c |= ((__type) & SBI_NACL_SHMEM_HFENCE_CONFIG_TYPE_MASK) \
106 __c |= (((__order) - SBI_NACL_SHMEM_HFENCE_ORDER_BASE) & \
109 __c |= ((__vmid) & SBI_NACL_SHMEM_HFENCE_CONFIG_VMID_MASK) \
111 __c |= ((__asid) & SBI_NACL_SHMEM_HFENCE_CONFIG_ASID_MASK); \
112 __c; \
/arch/x86/kvm/
A Dx86.h647 #define __cr4_reserved_bits(__cpu_has, __c) \ argument
651 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \
653 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \
655 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \
657 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \
659 if (!__cpu_has(__c, X86_FEATURE_PKU)) \
661 if (!__cpu_has(__c, X86_FEATURE_LA57)) \
663 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \
665 if (!__cpu_has(__c, X86_FEATURE_VMX)) \
667 if (!__cpu_has(__c, X86_FEATURE_PCID)) \
[all …]
/arch/sh/include/asm/
A Dstring_32.h88 extern void *memset(void *__s, int __c, size_t __count);
97 extern void *memchr(const void *__s, int __c, size_t __n);
/arch/xtensa/include/asm/
A Dstring.h110 extern void *memset(void *__s, int __c, size_t __count);
111 extern void *__memset(void *__s, int __c, size_t __count);
/arch/mips/include/asm/
A Dstring.h14 extern void *memset(void *__s, int __c, size_t __count);
/arch/riscv/kvm/
A Daia_imsic.c62 #define imsic_vs_csr_read(__c) \ argument
65 csr_write(CSR_VSISELECT, __c); \
102 #define imsic_vs_csr_swap(__c, __v) \ argument
105 csr_write(CSR_VSISELECT, __c); \
142 #define imsic_vs_csr_write(__c, __v) \ argument
144 csr_write(CSR_VSISELECT, __c); \
179 #define imsic_vs_csr_set(__c, __v) \ argument
181 csr_write(CSR_VSISELECT, __c); \

Completed in 23 milliseconds