| /arch/arm64/kvm/hyp/vhe/ |
| A D | sysreg-sr.c | 21 __vcpu_assign_sys_reg(vcpu, PAR_EL1, read_sysreg(par_el1)); in __sysreg_save_vel2_state()
22 __vcpu_assign_sys_reg(vcpu, TPIDR_EL1, read_sysreg(tpidr_el1)); in __sysreg_save_vel2_state()
24 __vcpu_assign_sys_reg(vcpu, ESR_EL2, read_sysreg_el1(SYS_ESR)); in __sysreg_save_vel2_state()
25 __vcpu_assign_sys_reg(vcpu, AFSR0_EL2, read_sysreg_el1(SYS_AFSR0)); in __sysreg_save_vel2_state()
26 __vcpu_assign_sys_reg(vcpu, AFSR1_EL2, read_sysreg_el1(SYS_AFSR1)); in __sysreg_save_vel2_state()
27 __vcpu_assign_sys_reg(vcpu, FAR_EL2, read_sysreg_el1(SYS_FAR)); in __sysreg_save_vel2_state()
28 __vcpu_assign_sys_reg(vcpu, MAIR_EL2, read_sysreg_el1(SYS_MAIR)); in __sysreg_save_vel2_state()
29 __vcpu_assign_sys_reg(vcpu, VBAR_EL2, read_sysreg_el1(SYS_VBAR)); in __sysreg_save_vel2_state()
52 __vcpu_assign_sys_reg(vcpu, TCR_EL2, read_sysreg_el1(SYS_TCR)); in __sysreg_save_vel2_state()
77 __vcpu_assign_sys_reg(vcpu, SP_EL2, read_sysreg(sp_el1)); in __sysreg_save_vel2_state()
[all …]
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| A D | switch.c | 155 __vcpu_assign_sys_reg(vcpu, CNTP_CVAL_EL0, val); in __deactivate_traps()
157 __vcpu_assign_sys_reg(vcpu, CNTHP_CVAL_EL2, val); in __deactivate_traps()
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| /arch/arm64/kvm/vgic/ |
| A D | vgic-v3-nested.c | 364 __vcpu_assign_sys_reg(vcpu, ICH_HCR_EL2, val); in vgic_v3_put_nested()
365 __vcpu_assign_sys_reg(vcpu, ICH_VMCR_EL2, s_cpu_if->vgic_vmcr); in vgic_v3_put_nested()
368 __vcpu_assign_sys_reg(vcpu, ICH_AP0RN(i), s_cpu_if->vgic_ap0r[i]); in vgic_v3_put_nested()
369 __vcpu_assign_sys_reg(vcpu, ICH_AP1RN(i), s_cpu_if->vgic_ap1r[i]); in vgic_v3_put_nested()
378 __vcpu_assign_sys_reg(vcpu, ICH_LRN(i), val); in vgic_v3_put_nested()
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| /arch/arm64/kvm/ |
| A D | pmu-emul.c | 181 __vcpu_assign_sys_reg(vcpu, reg, val); in kvm_pmu_set_pmc_value()
207 __vcpu_assign_sys_reg(vcpu, counter_index_to_reg(select_idx), val); in kvm_pmu_set_counter_value_user()
242 __vcpu_assign_sys_reg(vcpu, reg, val); in kvm_pmu_stop_counter()
506 __vcpu_assign_sys_reg(vcpu, counter_index_to_reg(i), reg); in kvm_pmu_counter_increment()
605 __vcpu_assign_sys_reg(vcpu, PMCR_EL0, (val & ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P))); in kvm_pmu_handle_pmcr()
782 __vcpu_assign_sys_reg(vcpu, reg, (data & kvm_pmu_evtyper_mask(vcpu->kvm))); in kvm_pmu_set_counter_event_type()
1041 __vcpu_assign_sys_reg(vcpu, MDCR_EL2, val); in kvm_arm_set_nr_counters()
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| A D | sys_regs.h | 140 __vcpu_assign_sys_reg(vcpu, r->reg, 0x1de7ec7edbadc0deULL); in reset_unknown()
148 __vcpu_assign_sys_reg(vcpu, r->reg, r->val); in reset_val()
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| A D | arch_timer.c | 111 __vcpu_assign_sys_reg(vcpu, CNTV_CTL_EL0, ctl); in timer_set_ctl()
114 __vcpu_assign_sys_reg(vcpu, CNTP_CTL_EL0, ctl); in timer_set_ctl()
117 __vcpu_assign_sys_reg(vcpu, CNTHV_CTL_EL2, ctl); in timer_set_ctl()
120 __vcpu_assign_sys_reg(vcpu, CNTHP_CTL_EL2, ctl); in timer_set_ctl()
133 __vcpu_assign_sys_reg(vcpu, CNTV_CVAL_EL0, cval); in timer_set_cval()
136 __vcpu_assign_sys_reg(vcpu, CNTP_CVAL_EL0, cval); in timer_set_cval()
139 __vcpu_assign_sys_reg(vcpu, CNTHV_CVAL_EL2, cval); in timer_set_cval()
142 __vcpu_assign_sys_reg(vcpu, CNTHP_CVAL_EL2, cval); in timer_set_cval()
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| A D | sys_regs.c | 231 __vcpu_assign_sys_reg(vcpu, reg, val); in vcpu_write_sys_reg()
266 __vcpu_assign_sys_reg(vcpu, reg, val); in vcpu_write_sys_reg()
607 __vcpu_assign_sys_reg(vcpu, rd->reg, val); in set_oslsr_el1()
843 __vcpu_assign_sys_reg(vcpu, r->reg, pmcr); in reset_pmcr()
1193 __vcpu_assign_sys_reg(vcpu, PMUSERENR_EL0, in access_pmuserenr()
1245 __vcpu_assign_sys_reg(vcpu, r->reg, val); in set_pmcr()
2232 __vcpu_assign_sys_reg(vcpu, r->reg, clidr); in reset_clidr()
2246 __vcpu_assign_sys_reg(vcpu, rd->reg, val); in set_clidr()
2477 __vcpu_assign_sys_reg(vcpu, r->reg, val); in reset_hcr()
2681 __vcpu_assign_sys_reg(vcpu, MDCR_EL2, val); in access_mdcr()
[all …]
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| A D | vgic-sys-reg-v3.c | 303 __vcpu_assign_sys_reg(vcpu, r->reg, val); in set_gic_ich_reg()
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| /arch/arm64/kvm/hyp/include/hyp/ |
| A D | sysreg-sr.h | 353 __vcpu_assign_sys_reg(vcpu, DACR32_EL2, read_sysreg(dacr32_el2)); in __sysreg32_save_state()
354 __vcpu_assign_sys_reg(vcpu, IFSR32_EL2, read_sysreg(ifsr32_el2)); in __sysreg32_save_state()
357 __vcpu_assign_sys_reg(vcpu, DBGVCR32_EL2, read_sysreg(dbgvcr32_el2)); in __sysreg32_save_state()
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| A D | switch.h | 48 __vcpu_assign_sys_reg(vcpu, FPEXC32_EL2, read_sysreg(fpexc32_el2)); in __fpsimd_save_fpexc32()
624 __vcpu_assign_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu), zcr_el1); in fpsimd_lazy_switch_to_host()
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| /arch/arm64/kvm/hyp/ |
| A D | exception.c | 42 __vcpu_assign_sys_reg(vcpu, reg, val); in __vcpu_write_sys_reg()
56 __vcpu_assign_sys_reg(vcpu, SPSR_EL1, val); in __vcpu_write_spsr()
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| /arch/arm64/kvm/hyp/nvhe/ |
| A D | hyp-main.c | 29 __vcpu_assign_sys_reg(vcpu, ZCR_EL1, read_sysreg_el1(SYS_ZCR)); in __hyp_sve_save_guest()
85 __vcpu_assign_sys_reg(vcpu, FPMR, read_sysreg_s(SYS_FPMR)); in fpsimd_sve_sync()
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| /arch/arm64/include/asm/ |
| A D | kvm_host.h | 1133 #define __vcpu_assign_sys_reg(v, r, val) \ macro
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