| /arch/xtensa/include/asm/ |
| A D | bitops.h | 102 static inline void arch_##op##_bit(unsigned int bit, volatile unsigned long *p)\
122 arch_test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
145 static inline void arch_##op##_bit(unsigned int bit, volatile unsigned long *p)\
166 arch_test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
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| /arch/sh/kernel/cpu/sh4a/ |
| A D | clock-sh7366.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
128 #define MSTP(_parent, _reg, _bit, _flags) \ argument
129 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
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| A D | clock-sh7343.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
106 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
125 #define MSTP(_parent, _reg, _bit, _flags) \ argument
126 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
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| A D | clock-sh7757.c | 62 #define DIV4(_bit, _mask, _flags) \ argument
63 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
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| A D | clock-shx3.c | 61 #define DIV4(_bit, _mask, _flags) \ argument
62 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| A D | clock-sh7785.c | 66 #define DIV4(_bit, _mask, _flags) \ argument
67 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| A D | clock-sh7786.c | 67 #define DIV4(_bit, _mask, _flags) \ argument
68 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| A D | clock-sh7722.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7734.c | 69 #define DIV4(_reg, _bit, _mask, _flags) \ argument
70 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7723.c | 111 #define DIV4(_reg, _bit, _mask, _flags) \ argument
112 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7724.c | 150 #define DIV4(_reg, _bit, _mask, _flags) \ argument
151 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| /arch/sh/kernel/cpu/sh2a/ |
| A D | clock-sh7264.c | 77 #define DIV4(_reg, _bit, _mask, _flags) \ argument
78 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7269.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
106 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| /arch/x86/kvm/vmx/ |
| A D | vmx.h | 453 return bitop##_bit(msr, bitmap + base / f); \
455 return bitop##_bit(msr & 0x1fff, bitmap + (base + 0x400) / f); \
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| /arch/arm64/kvm/ |
| A D | arch_timer.c | 719 #define assign_clear_set_bit(_pred, _bit, _clr, _set) \ argument
722 (_set) |= (_bit); \
724 (_clr) |= (_bit); \
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| /arch/x86/kvm/svm/ |
| A D | svm.h | 663 return bitop##_bit(bit_nr + bit_rw, bitmap); \
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