| /arch/arm/probes/ |
| A D | decode.h | 306 {.bits = (_mask)}, \
315 #define DECODE_TABLE(_mask, _value, _table) \ argument
325 #define DECODE_CUSTOM(_mask, _value, _decoder) \ argument
339 #define DECODE_SIMULATE(_mask, _value, _handler) \ argument
340 DECODE_SIMULATEX(_mask, _value, _handler, 0)
352 #define DECODE_EMULATE(_mask, _value, _handler) \ argument
353 DECODE_EMULATEX(_mask, _value, _handler, 0)
360 #define DECODE_OR(_mask, _value) \ argument
361 DECODE_HEADER(DECODE_TYPE_OR, _mask, _value, 0)
373 #define DECODE_REJECT(_mask, _value) \ argument
[all …]
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| /arch/sh/kernel/cpu/sh2a/ |
| A D | clock-sh7264.c | 77 #define DIV4(_reg, _bit, _mask, _flags) \ argument
78 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7269.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
106 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| /arch/sh/kernel/cpu/sh4a/ |
| A D | clock-sh7757.c | 62 #define DIV4(_bit, _mask, _flags) \ argument
63 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
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| A D | clock-shx3.c | 61 #define DIV4(_bit, _mask, _flags) \ argument
62 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| A D | clock-sh7785.c | 66 #define DIV4(_bit, _mask, _flags) \ argument
67 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| A D | clock-sh7786.c | 67 #define DIV4(_bit, _mask, _flags) \ argument
68 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| A D | clock-sh7722.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7366.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7734.c | 69 #define DIV4(_reg, _bit, _mask, _flags) \ argument
70 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7343.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
106 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7723.c | 111 #define DIV4(_reg, _bit, _mask, _flags) \ argument
112 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| A D | clock-sh7724.c | 150 #define DIV4(_reg, _bit, _mask, _flags) \ argument
151 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| /arch/loongarch/include/asm/ |
| A D | kvm_csr.h | 208 unsigned long _mask = mask; in kvm_change_sw_gcsr() local
210 csr->csrs[gid] &= ~_mask; in kvm_change_sw_gcsr()
211 csr->csrs[gid] |= val & _mask; in kvm_change_sw_gcsr()
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| /arch/mips/include/asm/ |
| A D | kvm_host.h | 463 unsigned long _mask = mask; \
464 cop0->reg[(_reg)][(sel)] &= ~_mask; \
465 cop0->reg[(_reg)][(sel)] |= val & _mask; \
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| /arch/x86/crypto/ |
| A D | cast5-avx-x86_64-asm_64.S | 200 .section .rodata.cst4.16_mask, "aM", @progbits, 4
204 .section .rodata.cst4.32_mask, "aM", @progbits, 4
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