| /arch/openrisc/include/asm/ |
| A D | spr.h | 16 #define mtspr(_spr, _val) __asm__ __volatile__ ( \ argument
18 : : "K" (_spr), "r" (_val))
19 #define mtspr_off(_spr, _off, _val) __asm__ __volatile__ ( \ argument
21 : : "r" (_off), "r" (_val), "K" (_spr))
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| /arch/riscv/include/asm/ |
| A D | errata_list.h | 68 #define ALT_SVPBMT(_val, prot) \ argument
74 : "=r"(_val) \
86 #define ALT_THEAD_PMA(_val) \ argument
98 : "+r"(_val) \
104 #define ALT_THEAD_PMA(_val) argument
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| A D | vector.h | 25 #define __riscv_v_vstate_or(_val, TYPE) ({ \ argument
26 typeof(_val) _res = _val; \
34 #define __riscv_v_vstate_check(_val, TYPE) ({ \ argument
37 _res = ((_val) & SR_VS_THEAD) == SR_VS_##TYPE##_THEAD; \
39 _res = ((_val) & SR_VS) == SR_VS_##TYPE; \
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| A D | pgtable.h | 122 #define __page_val_to_pfn(_val) (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT) argument
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| /arch/arm64/include/asm/ |
| A D | rqspinlock.h | 71 __unqual_scalar_typeof(*ptr) _val; \
75 _val = __smp_cond_load_acquire_timewait(ptr, cond_expr, \
79 _val = __smp_cond_load_relaxed_spinwait(ptr, cond_expr, \
84 (typeof(*ptr))_val; \
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| A D | gcs.h | 22 register long _val __asm__ ("x1") = val; in gcsstr()
28 : "rZ" (_val), "r" (_addr) in gcsstr()
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| A D | barrier.h | 117 u64 tmp, _val = (val); \
123 : "=r" (tmp) : "r" (_val)); \
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| A D | uaccess.h | 510 register unsigned long _val __asm__ ("x1") = val; in gcssttr()
519 : "rZ" (_val), "r" (_addr) in gcssttr()
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| /arch/mips/include/asm/ |
| A D | mips-gic.h | 141 uint64_t _val; \
144 _val = __raw_readq(addr); \
145 _val &= ~BIT_ULL(intr % 64); \
146 _val |= (uint64_t)val << (intr % 64); \
147 __raw_writeq(_val, addr); \
149 uint32_t _val; \
152 _val = __raw_readl(addr); \
153 _val &= ~BIT(intr % 32); \
154 _val |= val << (intr % 32); \
155 __raw_writel(_val, addr); \
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| /arch/x86/include/asm/ |
| A D | rmwcc.h | 48 #define GEN_BINARY_RMWcc_6(op, var, cc, vcon, _val, arg0) \ argument
50 __CLOBBERS_MEM(), [val] vcon (_val))
61 #define GEN_BINARY_SUFFIXED_RMWcc(op, suffix, var, cc, vcon, _val, clobbers...)\ argument
63 __CLOBBERS_MEM(clobbers), [val] vcon (_val))
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| A D | percpu.h | 163 #define __raw_cpu_write(size, qual, _var, _val) \ argument
165 __pcpu_type_##size pto_val__ = __pcpu_cast_##size(_val); \
169 pto_tmp__ = (_val); \
204 #define percpu_binary_op(size, qual, op, _var, _val) \ argument
206 __pcpu_type_##size pto_val__ = __pcpu_cast_##size(_val); \
210 pto_tmp__ = (_val); \
245 #define percpu_add_return_op(size, qual, _var, _val) \ argument
247 __pcpu_type_##size paro_tmp__ = __pcpu_cast_##size(_val); \
254 (typeof(_var))(unsigned long) (paro_tmp__ + _val); \
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| A D | pgtable-3level.h | 22 #define pxx_xchg64(_pxx, _ptr, _val) ({ \ argument
25 do { } while (!try_cmpxchg64(_p, &_o, (_val))); \
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| /arch/mips/include/asm/sn/ |
| A D | agent.h | 33 #define SET_HUB_NIC(_my_cpuid, _val) \ argument
34 (HUB_S(HUB_NIC_ADDR(_my_cpuid), (_val)))
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| A D | addrs.h | 208 #define BDPRT_ENTRY_S(_pa, _rgn, _val) (*(__psunsigned_t *)BDPRT_ENTRY((_pa), (_rgn))=(_val)) argument
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| /arch/mips/ath25/ |
| A D | devices.h | 7 #define ATH25_REG_MS(_val, _field) (((_val) & _field##_M) >> _field##_S) argument
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| /arch/mips/pci/ |
| A D | pci-alchemy.c | 265 u8 _val; in alchemy_pci_read() local
266 int rc = read_config_byte(bus, devfn, where, &_val); in alchemy_pci_read()
268 *val = _val; in alchemy_pci_read()
272 u16 _val; in alchemy_pci_read() local
273 int rc = read_config_word(bus, devfn, where, &_val); in alchemy_pci_read()
275 *val = _val; in alchemy_pci_read()
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| /arch/loongarch/include/asm/ |
| A D | percpu.h | 109 #define _percpu_write(size, _pcp, _val) \ argument
114 : [val] "r"(_val), [ptr] "r"(&(_pcp)) \
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| /arch/s390/include/asm/ |
| A D | page.h | 89 static __always_inline unsigned long name ## _val(name ## _t name) \
105 static __always_inline unsigned long name ## _val(name ## _t name) \
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| /arch/mips/include/asm/sn/sn0/ |
| A D | hubmd.h | 437 #define SET_CPU_LEDS(_nasid, _slice, _val) \ argument
438 (HUB_S(CPU_LED_ADDR(_nasid, _slice), (_val)))
|