Searched refs:accessed (Results 1 – 24 of 24) sorted by relevance
120 # Make $18 point to last quad to be accessed (the127 # At least two quads remain to be accessed.133 # At least three quads remain to be accessed
139 # Make $18 point to last quad to be accessed (the145 # At least two quads remain to be accessed.150 # At least three quads remain to be accessed
82 u32 accessed; /* Bit mask of read eBPF registers */ member129 ctx->accessed |= BIT(reg); in access_reg()
465 if (ctx->accessed & BIT(JIT_REG_ZX)) { in emit_call()575 if (ctx->accessed & BIT(BPF_REG_FP)) in build_prologue()577 if (ctx->accessed & BIT(JIT_REG_TC)) in build_prologue()579 if (ctx->accessed & BIT(JIT_REG_ZX)) in build_prologue()605 if (ctx->accessed & BIT(BPF_REG_FP)) in build_prologue()609 if (ctx->accessed & BIT(JIT_REG_ZX)) { in build_prologue()
1410 if (ctx->accessed & BIT(BPF_REG_FP)) in build_prologue()1436 if (ctx->accessed & BIT(BPF_REG_FP)) in build_prologue()
34 * OR1K PIC is built into CPU and accessed via special purpose
46 * OR1K PIC is built into CPU and accessed via special purpose
81 * The PHYs are accessed over the external MDIO206 * and PHY5 for WAN need to be accessed
66 * Following SODIMM Pins should not be accessed as GPIO on Aster board:
57 * Add the phy clock here, so the phy can be accessed to read its
162 4 UART registers will be accessed by means of lb/sb, lh/sh or lw/sw
2520 # accessed for another instruction immediately preceding when these
34 lines to host portals. They may be accessed with 'telnet <host>
102 * This means the adapter can be accessed with 8, 16 or
66 # This is the library version which is accessed as a subroutine #483 # This is the library version which is accessed as a subroutine #
433 The 68060 generally uses copyback caching of recently accessed data.
231 per-page basis (but only for pages accessed via MMU such as
1708 accessed bit in PTE entries when using them as part of linear address1716 accessed bit in non-leaf PMD entries when using them as part of linear1717 address translations. Page table walkers that clear the accessed bit
744 * Resource allocated to M4 by default, must not be accessed from Cortex-A35 or you get an OOPS
1329 which the systemcfg page can be accessed.
761 accessed by a core while another core is remapping the virtual2212 which is accessed during the translation table walk and for which
699 * is accessed. This is used to transparently access
2743 * is accessed. This is used to transparently access
1866 only be accessed by code running within the enclave. Accesses from
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