| /arch/x86/events/amd/ |
| A D | uncore.c | 42 unsigned long active_mask[BITS_TO_LONGS(NUM_COUNTERS_MAX)]; member 54 cpumask_t active_mask; member 110 for_each_set_bit(bit, ctx->active_mask, NUM_COUNTERS_MAX) { in amd_uncore_hrtimer() 176 __set_bit(hwc->idx, ctx->active_mask); in amd_uncore_start() 198 __clear_bit(hwc->idx, ctx->active_mask); in amd_uncore_stop() 324 return cpumap_print_to_pagebuf(true, buf, &pmu->active_mask); in amd_uncore_attr_show_cpumask() 488 cpumask_clear_cpu(cpu, &pmu->active_mask); in amd_uncore_ctx_free() 554 cpumask_set_cpu(cpu, &pmu->active_mask); in amd_uncore_ctx_init() 592 cpumask_clear_cpu(cpu, &pmu->active_mask); in amd_uncore_ctx_move() 593 cpumask_set_cpu(j, &pmu->active_mask); in amd_uncore_ctx_move() [all …]
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| A D | core.c | 742 if (!test_bit(idx, cpuc->active_mask)) in amd_pmu_check_overflow() 763 if (!test_bit(idx, cpuc->active_mask)) in amd_pmu_enable_all() 986 if (!test_bit(idx, cpuc->active_mask)) in amd_pmu_v2_handle_irq()
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| /arch/sh/include/asm/ |
| A D | hw_breakpoint.h | 37 unsigned long (*active_mask)(void); member
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| /arch/s390/kvm/ |
| A D | interrupt.c | 345 unsigned long active_mask) in disable_iscs() argument 353 return active_mask; in disable_iscs() 358 unsigned long active_mask; in deliverable_irqs() local 360 active_mask = pending_irqs(vcpu); in deliverable_irqs() 361 if (!active_mask) in deliverable_irqs() 365 active_mask &= ~IRQ_PEND_EXT_MASK; in deliverable_irqs() 367 active_mask &= ~IRQ_PEND_IO_MASK; in deliverable_irqs() 369 active_mask = disable_iscs(vcpu, active_mask); in deliverable_irqs() 405 return active_mask; in deliverable_irqs() 1742 unsigned long active_mask; in get_top_gisa_isc() local [all …]
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| /arch/sh/kernel/cpu/sh4a/ |
| A D | ubc.c | 93 .active_mask = sh4a_ubc_active_mask,
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| /arch/sh/kernel/ |
| A D | hw_breakpoint.c | 289 resume_mask = sh_ubc->active_mask(); in hw_breakpoint_handler()
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| A D | perf_event.c | 31 unsigned long active_mask[BITS_TO_LONGS(MAX_HWEVENTS)]; member
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| /arch/x86/events/intel/ |
| A D | knc.c | 249 if (!test_bit(bit, cpuc->active_mask)) in knc_pmu_handle_irq()
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| A D | p4.c | 926 if (!test_bit(idx, cpuc->active_mask)) in p4_pmu_disable_all() 1005 if (!test_bit(idx, cpuc->active_mask)) in p4_pmu_enable_all() 1048 if (!test_bit(idx, cpuc->active_mask)) { in p4_pmu_handle_irq()
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| A D | core.c | 2303 if (bts && test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) in __intel_pmu_disable_all() 2329 if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) { in __intel_pmu_enable_all() 2495 if (!test_bit(3, cpuc->active_mask)) in intel_tfa_pmu_enable_all() 2555 if (*(u64 *)cpuc->active_mask & INTEL_PMC_OTHER_TOPDOWN_BITS(idx)) in intel_pmu_disable_fixed() 2717 for_each_set_bit(idx, cpuc->active_mask, metric_end + 1) { in update_saved_topdown_regs() 2760 for_each_set_bit(idx, cpuc->active_mask, metric_end + 1) { in intel_update_topdown_event() 2773 if (event && !test_bit(event->hw.idx, cpuc->active_mask)) { in intel_update_topdown_event() 3253 if (!test_bit(bit, cpuc->active_mask)) in handle_pmi_common() 4658 if (!test_bit(idx, cpuc->active_mask)) in core_guest_get_msrs() 4688 if (!test_bit(idx, cpuc->active_mask) || in core_pmu_enable_all() [all …]
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| A D | bts.c | 543 if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) in bts_event_add()
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| A D | uncore.h | 151 unsigned long active_mask[BITS_TO_LONGS(UNCORE_PMC_IDX_MAX)]; member
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| A D | uncore.c | 323 for_each_set_bit(bit, box->active_mask, UNCORE_PMC_IDX_MAX) in uncore_pmu_hrtimer() 532 __set_bit(idx, box->active_mask); in uncore_pmu_event_start() 555 if (__test_and_clear_bit(hwc->idx, box->active_mask)) { in uncore_pmu_event_stop()
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| A D | ds.c | 2449 if (!test_bit(0, cpuc->active_mask)) in intel_pmu_drain_pebs_core()
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| /arch/powerpc/perf/ |
| A D | imc-pmu.c | 107 cpumask_t *active_mask; in imc_pmu_cpumask_get_attr() local 111 active_mask = &nest_imc_cpumask; in imc_pmu_cpumask_get_attr() 114 active_mask = &core_imc_cpumask; in imc_pmu_cpumask_get_attr() 120 return cpumap_print_to_pagebuf(true, buf, active_mask); in imc_pmu_cpumask_get_attr()
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| /arch/x86/events/ |
| A D | core.c | 701 if (!test_bit(idx, cpuc->active_mask)) in x86_pmu_disable_all() 757 if (!test_bit(idx, cpuc->active_mask)) in x86_pmu_enable_all() 1535 __set_bit(idx, cpuc->active_mask); in x86_pmu_start() 1580 pr_info("CPU#%d: active: %016llx\n", cpu, *(u64 *)cpuc->active_mask); in perf_event_print_debug() 1610 if (test_bit(hwc->idx, cpuc->active_mask)) { in x86_pmu_stop() 1612 __clear_bit(hwc->idx, cpuc->active_mask); in x86_pmu_stop() 1710 if (!test_bit(idx, cpuc->active_mask)) in x86_pmu_handle_irq()
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| A D | perf_event.h | 259 unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; member
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| /arch/x86/events/zhaoxin/ |
| A D | core.c | 392 if (!test_bit(bit, cpuc->active_mask)) in zhaoxin_pmu_handle_irq()
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