| /arch/um/include/asm/ |
| A D | cpufeature.h | 34 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word )) 37 test_cpu_cap(c, bit) 40 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 52 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit)) 54 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) argument 65 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit) argument 126 #define cpu_has_bug(c, bit) cpu_has(c, (bit)) argument 127 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) argument 129 #define static_cpu_has_bug(bit) static_cpu_has((bit)) argument 130 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) argument [all …]
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| /arch/x86/include/asm/ |
| A D | cpufeature.h | 55 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 59 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 72 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit)) 74 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) argument 91 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit) argument 125 #define cpu_has_bug(c, bit) cpu_has(c, (bit)) argument 126 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) argument 127 #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) argument 129 #define static_cpu_has_bug(bit) static_cpu_has((bit)) argument 130 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) argument [all …]
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| /arch/nios2/include/asm/ |
| A D | asm-macros.h | 79 .if \bit > 31 82 .if \bit < 16 98 BT \reg1, \reg2, \bit 110 BT \reg1, \reg2, \bit 122 .if \bit > 31 125 .if \bit < 16 143 .if \bit > 31 146 .if \bit < 16 164 .if \bit > 31 167 .if \bit < 16 [all …]
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| /arch/alpha/kernel/ |
| A D | sys_sable.c | 97 if (bit >= 16) { in sable_update_irq_hw() 100 } else if (bit >= 8) { in sable_update_irq_hw() 113 if (bit >= 16) { in sable_ack_irq_hw() 115 val1 = 0xE0 | (bit - 16); in sable_ack_irq_hw() 117 } else if (bit >= 8) { in sable_ack_irq_hw() 119 val1 = 0xE0 | (bit - 8); in sable_ack_irq_hw() 123 val1 = 0xE0 | (bit - 0); in sable_ack_irq_hw() 221 unsigned long bit, mask; in sable_lynx_enable_irq() local 237 unsigned long bit, mask; in sable_lynx_disable_irq() local 253 unsigned long bit, mask; in sable_lynx_mask_and_ack_irq() local [all …]
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| /arch/sh/boards/mach-x3proto/ |
| A D | ilsel.c | 48 return ILSEL_LEVELS - bit - 1; in ilsel_offset() 58 return (ilsel_offset(bit) & 0x3) << 2; in mk_ilsel_shift() 68 addr = mk_ilsel_addr(bit); in __ilsel_enable() 69 shift = mk_ilsel_shift(bit); in __ilsel_enable() 72 __func__, bit, addr, shift, set); in __ilsel_enable() 94 unsigned int bit; in ilsel_enable() local 105 __ilsel_enable(set, bit); in ilsel_enable() 107 return bit; in ilsel_enable() 124 unsigned int bit = ilsel_offset(level - 1); in ilsel_enable_fixed() local 129 __ilsel_enable(set, bit); in ilsel_enable_fixed() [all …]
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| /arch/x86/events/ |
| A D | probe.c | 24 unsigned int bit; in perf_msr_probe() local 30 for (bit = 0; bit < cnt; bit++) { in perf_msr_probe() 31 if (!msr[bit].no_check) { in perf_msr_probe() 32 struct attribute_group *grp = msr[bit].grp; in perf_msr_probe() 42 if (!msr[bit].msr) in perf_msr_probe() 45 if (msr[bit].test && !msr[bit].test(bit, data)) in perf_msr_probe() 48 if (rdmsrq_safe(msr[bit].msr, &val)) in perf_msr_probe() 51 mask = msr[bit].mask; in perf_msr_probe() 60 avail |= BIT(bit); in perf_msr_probe()
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| /arch/powerpc/kvm/ |
| A D | guest-state-buffer.c | 323 int bit = 0; in kvmppc_gse_flatten_iden() local 330 return bit; in kvmppc_gse_flatten_iden() 337 return bit; in kvmppc_gse_flatten_iden() 344 return bit; in kvmppc_gse_flatten_iden() 347 bit += KVMPPC_GSE_META_COUNT; in kvmppc_gse_flatten_iden() 351 return bit; in kvmppc_gse_flatten_iden() 358 return bit; in kvmppc_gse_flatten_iden() 365 return bit; in kvmppc_gse_flatten_iden() 368 bit += KVMPPC_GSE_VSRS_COUNT; in kvmppc_gse_flatten_iden() 372 return bit; in kvmppc_gse_flatten_iden() [all …]
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| /arch/arm/mach-shmobile/ |
| A D | platsmp-apmu.c | 28 int bit; member 50 writel_relaxed(BIT(bit), p + WUPCR_OFFS); in apmu_power_on() 62 writel_relaxed(3, p + CPUNCR_OFFS(bit)); in apmu_power_off() 84 return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL; in apmu_wrap() 194 apmu_cpus[cpu].bit = bit; in apmu_init_cpu() 200 x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN; in apmu_init_cpu() 213 int bit, index; in apmu_parse_dt() local 219 for (bit = 0; bit < CONFIG_NR_CPUS; bit++) { in apmu_parse_dt() 220 np_cpu = of_parse_phandle(np_apmu, "cpus", bit); in apmu_parse_dt() 233 for (bit = 0; bit < CONFIG_NR_CPUS; bit++) { in apmu_parse_dt() [all …]
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| /arch/powerpc/sysdev/ |
| A D | ipic.c | 38 .bit = 16, 45 .bit = 17, 52 .bit = 18, 59 .bit = 19, 66 .bit = 20, 73 .bit = 21, 80 .bit = 22, 87 .bit = 23, 94 .bit = 24, 151 .bit = 1, [all …]
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| A D | cpm2_pic.c | 79 int bit, word; in cpm2_mask_irq() local 82 bit = irq_to_siubit[irq_nr]; in cpm2_mask_irq() 85 ppc_cached_irq_mask[word] &= ~(1 << bit); in cpm2_mask_irq() 91 int bit, word; in cpm2_unmask_irq() local 94 bit = irq_to_siubit[irq_nr]; in cpm2_unmask_irq() 97 ppc_cached_irq_mask[word] |= 1 << bit; in cpm2_unmask_irq() 103 int bit, word; in cpm2_ack() local 106 bit = irq_to_siubit[irq_nr]; in cpm2_ack() 114 int bit, word; in cpm2_end_irq() local 117 bit = irq_to_siubit[irq_nr]; in cpm2_end_irq() [all …]
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| /arch/s390/include/asm/ |
| A D | airq.h | 66 airq_iv_free(iv, bit, 1); in airq_iv_free_bit() 74 static inline void airq_iv_lock(struct airq_iv *iv, unsigned long bit) in airq_iv_lock() argument 77 bit_spin_lock(bit ^ be_to_le, iv->bitlock); in airq_iv_lock() 80 static inline void airq_iv_unlock(struct airq_iv *iv, unsigned long bit) in airq_iv_unlock() argument 83 bit_spin_unlock(bit ^ be_to_le, iv->bitlock); in airq_iv_unlock() 89 iv->data[bit] = data; in airq_iv_set_data() 93 unsigned long bit) in airq_iv_get_data() argument 95 return iv->data[bit]; in airq_iv_get_data() 101 iv->ptr[bit] = ptr; in airq_iv_set_ptr() 105 unsigned long bit) in airq_iv_get_ptr() argument [all …]
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| A D | bitops.h | 88 #define for_each_set_bit_inv(bit, addr, size) \ argument 90 (bit) < (size); \ 91 (bit) = find_next_bit_inv((addr), (size), (bit) + 1)) 136 unsigned long bit = 0; in __flogr() local 142 bit += 32; in __flogr() 146 bit += 16; in __flogr() 150 bit += 8; in __flogr() 154 bit += 4; in __flogr() 158 bit += 2; in __flogr() 162 bit += 1; in __flogr() [all …]
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| /arch/mips/alchemy/common/ |
| A D | irq.c | 388 if ((bit < 0) || (bit > 7)) in au1x_ic1_setwake() 394 wakemsk |= 1 << bit; in au1x_ic1_setwake() 396 wakemsk &= ~(1 << bit); in au1x_ic1_setwake() 445 if (bit > 31) in au1x_ic_settype() 552 unsigned long bit; in au1300_pinfunc_to_dev() local 555 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_pinfunc_to_dev() 607 bit = GPIC_GPIO_TO_BIT(irq); in au1300_gpic_mask() 624 bit = GPIC_GPIO_TO_BIT(irq); in au1300_gpic_unmask() 636 bit = GPIC_GPIO_TO_BIT(irq); in au1300_gpic_maskack() 651 bit = GPIC_GPIO_TO_BIT(irq); in au1300_gpic_ack() [all …]
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| /arch/mips/loongson32/common/ |
| A D | irq.c | 29 | (1 << bit), LS1X_INTC_INTCLR(n)); in ls1x_irq_ack() 38 & ~(1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_mask() 47 & ~(1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_mask_ack() 49 | (1 << bit), LS1X_INTC_INTCLR(n)); in ls1x_irq_mask_ack() 58 | (1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_unmask() 69 | (1 << bit), LS1X_INTC_INTPOL(n)); in ls1x_irq_settype() 75 & ~(1 << bit), LS1X_INTC_INTPOL(n)); in ls1x_irq_settype() 81 | (1 << bit), LS1X_INTC_INTPOL(n)); in ls1x_irq_settype() 83 | (1 << bit), LS1X_INTC_INTEDGE(n)); in ls1x_irq_settype() 87 & ~(1 << bit), LS1X_INTC_INTPOL(n)); in ls1x_irq_settype() [all …]
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| /arch/arm/boot/dts/ti/omap/ |
| A D | omap24xx-clocks.dtsi | 12 ti,bit-shift = <2>; 26 ti,bit-shift = <6>; 78 ti,bit-shift = <23>; 94 ti,bit-shift = <6>; 103 ti,bit-shift = <6>; 132 ti,bit-shift = <2>; 142 ti,bit-shift = <6>; 152 ti,bit-shift = <5>; 180 ti,bit-shift = <3>; 196 ti,bit-shift = <7>; [all …]
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| A D | omap2430-clocks.dtsi | 26 ti,bit-shift = <2>; 40 ti,bit-shift = <4>; 56 ti,bit-shift = <0>; 64 ti,bit-shift = <5>; 80 ti,bit-shift = <0>; 102 ti,bit-shift = <1>; 110 ti,bit-shift = <3>; 118 ti,bit-shift = <3>; 126 ti,bit-shift = <4>; 134 ti,bit-shift = <4>; [all …]
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| A D | omap2420-clocks.dtsi | 13 ti,bit-shift = <15>; 21 ti,bit-shift = <8>; 35 ti,bit-shift = <11>; 45 ti,bit-shift = <1>; 53 ti,bit-shift = <5>; 69 ti,bit-shift = <10>; 77 ti,bit-shift = <8>; 100 ti,bit-shift = <8>; 108 ti,bit-shift = <28>; 172 ti,bit-shift = <3>; [all …]
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| /arch/m68k/math-emu/ |
| A D | fp_emu.h | 52 #define fp_set_sr(bit) ({ \ argument 53 FPDATA->fpsr |= 1 << (bit); \ 132 .macro fp_set_sr bit 133 bset #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA) 136 .macro fp_clr_sr bit 137 bclr #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA) 140 .macro fp_tst_sr bit 141 btst #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
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| /arch/mips/lib/ |
| A D | bitops.c | 24 unsigned int bit = nr % BITS_PER_LONG; in __mips_set_bit() local 28 mask = 1UL << bit; in __mips_set_bit() 45 unsigned int bit = nr % BITS_PER_LONG; in __mips_clear_bit() local 49 mask = 1UL << bit; in __mips_clear_bit() 66 unsigned int bit = nr % BITS_PER_LONG; in __mips_change_bit() local 70 mask = 1UL << bit; in __mips_change_bit() 88 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_set_bit_lock() local 93 mask = 1UL << bit; in __mips_test_and_set_bit_lock() 112 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_clear_bit() local 117 mask = 1UL << bit; in __mips_test_and_clear_bit() [all …]
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| /arch/mips/loongson2ef/common/ |
| A D | mem.c | 24 int bit; in prom_init_memory() local 26 bit = fls(memsize + highmemsize); in prom_init_memory() 27 if (bit != ffs(memsize + highmemsize)) in prom_init_memory() 28 bit += 20; in prom_init_memory() 30 bit = bit + 20 - 1; in prom_init_memory() 34 0x80000000ul, (1 << bit)); in prom_init_memory()
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| /arch/mips/include/asm/ |
| A D | bitops.h | 92 int bit = nr % BITS_PER_LONG; in set_bit() local 99 if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit) && (bit >= 16)) { in set_bit() 120 int bit = nr % BITS_PER_LONG; in clear_bit() local 161 int bit = nr % BITS_PER_LONG; in change_bit() local 183 int bit = nr % BITS_PER_LONG; in test_and_set_bit_lock() local 191 "ir"(BIT(bit))); in test_and_set_bit_lock() 227 int bit = nr % BITS_PER_LONG; in test_and_clear_bit() local 238 "i"(bit)); in test_and_clear_bit() 243 "ir"(BIT(bit))); in test_and_clear_bit() 264 int bit = nr % BITS_PER_LONG; in test_and_change_bit() local [all …]
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| /arch/arm/include/asm/ |
| A D | bitops.h | 39 unsigned long mask = BIT_MASK(bit); in ____atomic_set_bit() 41 p += BIT_WORD(bit); in ____atomic_set_bit() 51 unsigned long mask = BIT_MASK(bit); in ____atomic_clear_bit() 53 p += BIT_WORD(bit); in ____atomic_clear_bit() 63 unsigned long mask = BIT_MASK(bit); in ____atomic_change_bit() 65 p += BIT_WORD(bit); in ____atomic_change_bit() 77 unsigned long mask = BIT_MASK(bit); in ____atomic_test_and_set_bit() 79 p += BIT_WORD(bit); in ____atomic_test_and_set_bit() 94 unsigned long mask = BIT_MASK(bit); in ____atomic_test_and_clear_bit() 96 p += BIT_WORD(bit); in ____atomic_test_and_clear_bit() [all …]
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| /arch/xtensa/include/asm/ |
| A D | bitops.h | 102 static inline void arch_##op##_bit(unsigned int bit, volatile unsigned long *p)\ 105 unsigned long mask = 1UL << (bit & 31); \ 107 p += bit >> 5; \ 122 arch_test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \ 125 unsigned long mask = 1UL << (bit & 31); \ 127 p += bit >> 5; \ 148 unsigned long mask = 1UL << (bit & 31); \ 150 p += bit >> 5; \ 166 arch_test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \ 169 unsigned long mask = 1UL << (bit & 31); \ [all …]
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| /arch/mips/include/asm/mach-au1x00/ |
| A D | gpio-au1300.h | 32 int bit; in au1300_gpio_get_value() local 36 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_get_value() 37 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit; in au1300_gpio_get_value() 43 unsigned long bit; in au1300_gpio_direction_input() local 48 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_direction_input() 49 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR); in au1300_gpio_direction_input() 58 unsigned long bit; in au1300_gpio_set_value() local 63 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_set_value() 64 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL in au1300_gpio_set_value()
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| /arch/x86/lib/ |
| A D | msr.c | 64 static inline int __flip_bit(u32 msr, u8 bit, bool set) in __flip_bit() argument 69 if (bit > 63) in __flip_bit() 78 m1.q |= BIT_64(bit); in __flip_bit() 80 m1.q &= ~BIT_64(bit); in __flip_bit() 102 int msr_set_bit(u32 msr, u8 bit) in msr_set_bit() argument 104 return __flip_bit(msr, bit, true); in msr_set_bit() 118 int msr_clear_bit(u32 msr, u8 bit) in msr_clear_bit() argument 120 return __flip_bit(msr, bit, false); in msr_clear_bit()
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