| /arch/powerpc/kernel/ |
| A D | cacheinfo.c | 43 struct cache *cache; member
158 struct cache *cache; in new_cache() local
394 struct cache *cache; in cache_do_one_devnode() local
408 struct cache *cache; in cache_lookup_or_instantiate() local
592 struct cache *cache; in size_show() local
609 struct cache *cache; in line_size_show() local
625 struct cache *cache; in nr_sets_show() local
641 struct cache *cache; in associativity_show() local
656 struct cache *cache; in type_show() local
669 struct cache *cache; in level_show() local
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| /arch/arm64/boot/dts/amd/ |
| A D | amd-seattle-cpus.dtsi | 51 i-cache-sets = <256>;
55 l2-cache = <&L2_0>;
71 l2-cache = <&L2_0>;
86 l2-cache = <&L2_1>;
169 cache-unified;
177 cache-unified;
185 cache-unified;
193 cache-unified;
197 L3: l3-cache {
198 cache-level = <3>;
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| /arch/arm64/boot/dts/freescale/ |
| A D | imx943.dtsi | 38 i-cache-sets = <128>;
104 cache-level = <2>;
105 cache-unified;
114 cache-level = <2>;
115 cache-unified;
124 cache-level = <2>;
125 cache-unified;
134 cache-level = <2>;
135 cache-unified;
144 cache-level = <3>;
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| /arch/arm64/boot/dts/amazon/ |
| A D | alpine-v3.dtsi | 30 d-cache-sets = <256>;
33 i-cache-sets = <256>;
44 d-cache-sets = <256>;
47 i-cache-sets = <256>;
58 d-cache-sets = <256>;
61 i-cache-sets = <256>;
252 cache-level = <2>;
253 cache-unified;
262 cache-unified;
271 cache-unified;
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| /arch/arm64/boot/dts/ti/ |
| A D | k3-am654.dtsi | 43 i-cache-sets = <256>;
46 d-cache-sets = <128>;
57 i-cache-sets = <256>;
95 cache-level = <2>;
96 cache-unified;
99 cache-sets = <512>;
105 cache-level = <2>;
106 cache-unified;
109 cache-sets = <512>;
115 cache-level = <3>;
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| A D | k3-j784s4.dtsi | 65 i-cache-sets = <256>;
68 d-cache-sets = <256>;
79 i-cache-sets = <256>;
82 d-cache-sets = <256>;
93 i-cache-sets = <256>;
96 d-cache-sets = <256>;
107 i-cache-sets = <256>;
110 d-cache-sets = <256>;
121 i-cache-sets = <256>;
124 d-cache-sets = <256>;
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| A D | k3-am652.dtsi | 33 i-cache-sets = <256>;
36 d-cache-sets = <128>;
47 i-cache-sets = <256>;
50 d-cache-sets = <128>;
56 compatible = "cache";
57 cache-level = <2>;
58 cache-unified;
61 cache-sets = <512>;
66 compatible = "cache";
67 cache-level = <3>;
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| A D | k3-j742s2.dtsi | 45 i-cache-size = <0xc000>;
47 i-cache-sets = <256>;
48 d-cache-size = <0x8000>;
50 d-cache-sets = <256>;
59 i-cache-size = <0xc000>;
61 i-cache-sets = <256>;
64 d-cache-sets = <256>;
75 i-cache-sets = <256>;
78 d-cache-sets = <256>;
89 i-cache-sets = <256>;
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| A D | k3-am642.dtsi | 34 i-cache-size = <0x8000>;
36 i-cache-sets = <256>;
39 d-cache-sets = <128>;
50 i-cache-sets = <256>;
53 d-cache-sets = <128>;
59 compatible = "cache";
60 cache-level = <2>;
61 cache-unified;
62 cache-size = <0x40000>;
63 cache-line-size = <64>;
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| A D | k3-am625.dtsi | 46 i-cache-sets = <256>;
49 d-cache-sets = <128>;
63 i-cache-sets = <256>;
66 d-cache-sets = <128>;
80 i-cache-sets = <256>;
83 d-cache-sets = <128>;
97 i-cache-sets = <256>;
152 compatible = "cache";
153 cache-unified;
154 cache-level = <2>;
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| A D | k3-am62a7.dtsi | 46 i-cache-sets = <256>;
49 d-cache-sets = <128>;
63 i-cache-sets = <256>;
66 d-cache-sets = <128>;
80 i-cache-sets = <256>;
83 d-cache-sets = <128>;
97 i-cache-sets = <256>;
152 compatible = "cache";
153 cache-unified;
154 cache-level = <2>;
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| A D | k3-am62p5.dtsi | 45 i-cache-sets = <256>;
48 d-cache-sets = <128>;
62 i-cache-sets = <256>;
65 d-cache-sets = <128>;
79 i-cache-sets = <256>;
82 d-cache-sets = <128>;
96 i-cache-sets = <256>;
151 compatible = "cache";
152 cache-unified;
153 cache-level = <2>;
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| /arch/arm64/boot/dts/marvell/ |
| A D | armada-ap806-quad.dtsi | 24 i-cache-sets = <256>;
27 d-cache-sets = <256>;
39 i-cache-sets = <256>;
42 d-cache-sets = <256>;
54 i-cache-sets = <256>;
80 cache-sets = <512>;
81 cache-level = <2>;
82 cache-unified;
89 cache-sets = <512>;
90 cache-level = <2>;
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| A D | armada-ap807-quad.dtsi | 24 i-cache-sets = <256>;
27 d-cache-sets = <256>;
39 i-cache-sets = <256>;
42 d-cache-sets = <256>;
54 i-cache-sets = <256>;
80 cache-sets = <512>;
81 cache-level = <2>;
82 cache-unified;
89 cache-sets = <512>;
90 cache-level = <2>;
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| A D | armada-ap806-dual.dtsi | 22 i-cache-size = <0xc000>;
24 i-cache-sets = <256>;
25 d-cache-size = <0x8000>;
27 d-cache-sets = <256>;
39 i-cache-sets = <256>;
42 d-cache-sets = <256>;
46 l2: l2-cache {
47 compatible = "cache";
50 cache-sets = <512>;
51 cache-level = <2>;
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| /arch/riscv/boot/dts/sophgo/ |
| A D | sg2042-cpus.dtsi | 1990 cache-unified;
1999 cache-unified;
2008 cache-unified;
2017 cache-unified;
2026 cache-unified;
2035 cache-unified;
2044 cache-unified;
2053 cache-unified;
2062 cache-unified;
2071 cache-unified;
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| A D | sg2044-cpus.dtsi | 19 i-cache-size = <65536>;
20 i-cache-sets = <512>;
22 d-cache-size = <65536>;
23 d-cache-sets = <512>;
2617 cache-unified;
2627 cache-unified;
2637 cache-unified;
2647 cache-unified;
2657 cache-unified;
2667 cache-unified;
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| /arch/arm64/boot/dts/arm/ |
| A D | morello.dtsi | 47 l2_0: l2-cache {
49 cache-level = <2>;
54 cache-unified;
74 l2_1: l2-cache {
81 cache-unified;
101 l2_2: l2-cache {
108 cache-unified;
128 l2_3: l2-cache {
135 cache-unified;
140 l3_0: l3-cache {
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| A D | juno-r1.dts | 95 i-cache-sets = <256>;
98 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
129 i-cache-sets = <256>;
132 d-cache-sets = <128>;
192 cache-unified;
195 cache-sets = <2048>;
196 cache-level = <2>;
201 cache-unified;
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| A D | juno-r2.dts | 95 i-cache-sets = <256>;
98 d-cache-sets = <256>;
113 i-cache-sets = <256>;
116 d-cache-sets = <256>;
131 i-cache-sets = <256>;
134 d-cache-sets = <128>;
198 cache-unified;
201 cache-sets = <2048>;
202 cache-level = <2>;
207 cache-unified;
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| A D | juno.dts | 94 i-cache-sets = <256>;
97 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
130 i-cache-sets = <256>;
133 d-cache-sets = <128>;
197 cache-unified;
200 cache-sets = <2048>;
201 cache-level = <2>;
206 cache-unified;
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| A D | fvp-base-revc.dts | 78 i-cache-sets = <256>;
81 d-cache-sets = <256>;
92 i-cache-sets = <256>;
95 d-cache-sets = <256>;
106 i-cache-sets = <256>;
187 cache-sets = <512>;
188 cache-level = <2>;
189 cache-unified;
196 cache-sets = <512>;
197 cache-level = <2>;
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| /arch/arm/boot/dts/broadcom/ |
| A D | bcm2836.dtsi | 43 /* Source for d/i-cache-line-size and d/i-cache-sets
56 d-cache-size = <0x8000>;
59 i-cache-size = <0x8000>;
70 d-cache-size = <0x8000>;
73 i-cache-size = <0x8000>;
107 /* Source for cache-line-size + cache-sets
110 * Source for cache-size
114 compatible = "cache";
115 cache-unified;
116 cache-size = <0x80000>;
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| A D | bcm2837.dtsi | 42 /* Source for d/i-cache-line-size and d/i-cache-sets
55 d-cache-size = <0x8000>;
58 i-cache-size = <0x8000>;
70 d-cache-size = <0x8000>;
73 i-cache-size = <0x8000>;
109 /* Source for cache-line-size + cache-sets
112 * Source for cache-size
116 compatible = "cache";
117 cache-unified;
118 cache-size = <0x80000>;
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| /arch/riscv/boot/dts/andes/ |
| A D | qilai.dtsi | 29 i-cache-size = <0x8000>;
30 i-cache-sets = <256>;
33 d-cache-sets = <128>;
55 i-cache-sets = <256>;
58 d-cache-sets = <128>;
81 i-cache-sets = <256>;
84 d-cache-sets = <128>;
141 "andestech,ax45mp-cache", "cache";
145 cache-level = <2>;
146 cache-sets = <2048>;
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