| /arch/arm64/include/asm/ |
| A D | alternative-macros.h | 102 .macro alternative_insn insn1, insn2, cap, enable = 1
106 altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
138 .macro alternative_if_not cap
141 altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
146 .macro alternative_if cap
149 altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f
156 .macro alternative_cb cap, cb
159 altinstruction_entry 661f, \cb, (1 << ARM64_CB_SHIFT) | \cap, 662f-661f, 0
207 #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \ argument
208 alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
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| A D | cpucaps.h | 14 cpucap_is_possible(const unsigned int cap) in cpucap_is_possible() argument
16 compiletime_assert(__builtin_constant_p(cap), in cpucap_is_possible()
18 compiletime_assert(cap < ARM64_NCAPS, in cpucap_is_possible()
21 switch (cap) { in cpucap_is_possible()
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| A D | spectre.h | 85 bool has_spectre_v2(const struct arm64_cpu_capabilities *cap, int scope);
88 bool has_spectre_v3a(const struct arm64_cpu_capabilities *cap, int scope);
92 bool has_spectre_v4(const struct arm64_cpu_capabilities *cap, int scope);
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| /arch/x86/include/asm/ |
| A D | acpi.h | 117 static inline void arch_acpi_set_proc_cap_bits(u32 *cap) in arch_acpi_set_proc_cap_bits() argument
121 *cap |= ACPI_PROC_CAP_C_CAPABILITY_SMP; in arch_acpi_set_proc_cap_bits()
124 *cap |= ACPI_PROC_CAP_SMP_T_SWCOORD; in arch_acpi_set_proc_cap_bits()
127 *cap |= ACPI_PROC_CAP_EST_CAPABILITY_SWSMP; in arch_acpi_set_proc_cap_bits()
130 *cap |= ACPI_PROC_CAP_T_FFH; in arch_acpi_set_proc_cap_bits()
133 *cap |= ACPI_PROC_CAP_COLLAB_PROC_PERF; in arch_acpi_set_proc_cap_bits()
141 *cap &= ~(ACPI_PROC_CAP_C_C1_FFH | ACPI_PROC_CAP_C_C2C3_FFH); in arch_acpi_set_proc_cap_bits()
151 xen_sanitize_proc_cap_bits(cap); in arch_acpi_set_proc_cap_bits()
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| A D | intel_pt.h | 31 extern u32 intel_pt_validate_hw_cap(enum pt_capabilities cap);
32 extern u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities cap);
36 static inline u32 intel_pt_validate_hw_cap(enum pt_capabilities cap) { return 0; } in intel_pt_validate_hw_cap() argument
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| A D | irq_remapping.h | 53 extern bool irq_remapping_cap(enum irq_remap_cap cap);
77 static inline bool irq_remapping_cap(enum irq_remap_cap cap) { return 0; } in irq_remapping_cap() argument
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| /arch/x86/kernel/ |
| A D | vsmp_64.c | 30 unsigned int cap, ctl, cfg; in set_vsmp_ctl() local
35 cap = readl(address); in set_vsmp_ctl()
38 cap, ctl); in set_vsmp_ctl()
42 if (cap & ctl & BIT(8)) { in set_vsmp_ctl()
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| A D | aperture_64.c | 140 static u32 __init find_cap(int bus, int slot, int func, int cap) in find_cap() argument
157 if (id == cap) in find_cap()
166 static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order) in read_agp() argument
176 apsizereg = read_pci_config_16(bus, slot, func, cap + 0x14); in read_agp()
242 u32 class, cap; in search_agp_bridge() local
253 cap = find_cap(bus, slot, func, in search_agp_bridge()
255 if (!cap) in search_agp_bridge()
258 return read_agp(bus, slot, func, cap, in search_agp_bridge()
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| /arch/powerpc/include/asm/ |
| A D | async_tx.h | 12 ppc440spe_async_tx_find_best_channel(enum dma_transaction_type cap,
16 #define async_tx_find_channel(dep, cap, dst_lst, dst_cnt, src_lst, \ argument
18 ppc440spe_async_tx_find_best_channel(cap, dst_lst, dst_cnt, src_lst, \
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| /arch/sparc/kernel/ |
| A D | setup_64.c | 520 unsigned long cap = sparc64_elf_hwcap; in init_sparc64_elf_hwcap() local
524 cap |= HWCAP_SPARC_ULTRA3; in init_sparc64_elf_hwcap()
536 cap |= HWCAP_SPARC_BLKINIT; in init_sparc64_elf_hwcap()
546 cap |= HWCAP_SPARC_N2; in init_sparc64_elf_hwcap()
554 cap |= AV_SPARC_VIS; in init_sparc64_elf_hwcap()
556 cap |= AV_SPARC_VIS | AV_SPARC_VIS2; in init_sparc64_elf_hwcap()
563 cap |= AV_SPARC_POPC; in init_sparc64_elf_hwcap()
567 cap |= AV_SPARC_ASI_BLK_INIT; in init_sparc64_elf_hwcap()
577 cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 | in init_sparc64_elf_hwcap()
588 cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC | in init_sparc64_elf_hwcap()
[all …]
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| /arch/arm64/kernel/ |
| A D | cpufeature.c | 3149 __HWCAP_CAP(#cap, cap_type, cap) \
3155 __HWCAP_CAP(#cap, cap_type, cap) \
3162 __HWCAP_CAP(#cap, cap_type, cap) \
3168 __HWCAP_CAP(#cap, cap_type, cap) \
3511 if (WARN_ON(!cap)) in cpu_enable_non_boot_scope_capabilities()
3517 if (cap->cpu_enable) in cpu_enable_non_boot_scope_capabilities()
3518 cap->cpu_enable(cap); in cpu_enable_non_boot_scope_capabilities()
3798 if (cap) in this_cpu_has_cap()
3799 return cap->matches(cap, SCOPE_LOCAL_CPU); in this_cpu_has_cap()
3816 if (cap) in __system_matches_cap()
[all …]
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| /arch/arm/boot/dts/intel/socfpga/ |
| A D | socfpga_arria10_socdk_sdmmc.dts | 11 cap-sd-highspeed;
12 cap-mmc-highspeed;
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| A D | socfpga_arria5.dtsi | 24 cap-mmc-highspeed;
25 cap-sd-highspeed;
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| A D | socfpga_cyclone5.dtsi | 24 cap-mmc-highspeed;
25 cap-sd-highspeed;
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| /arch/arm/boot/dts/rockchip/ |
| A D | rockchip-radxa-dalang-carrier.dtsi | 91 cap-sd-highspeed;
92 cap-sdio-irq;
104 cap-mmc-highspeed;
105 cap-sd-highspeed;
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| /arch/arm64/boot/dts/rockchip/ |
| A D | rk3568-fastrhino-r66s.dts | 20 cap-mmc-highspeed;
21 cap-sd-highspeed;
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| A D | rk3566-radxa-zero-3w.dts | 57 cap-mmc-highspeed;
72 cap-sd-highspeed;
73 cap-sdio-irq;
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| A D | rk3576-luckfox-omni3576.dts | 43 cap-mmc-highspeed;
44 cap-sd-highspeed;
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| /arch/arm64/boot/dts/sophgo/ |
| A D | sg2000-milkv-duo-module-01.dtsi | 26 cap-mmc-hw-reset;
36 cap-sdio-irq;
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| /arch/powerpc/kernel/ |
| A D | eeh_pe.c | 634 int cap; in eeh_bridge_check_link() local
648 cap = edev->pcie_cap; in eeh_bridge_check_link()
649 eeh_ops->read_config(edev, cap + PCI_EXP_SLTSTA, 2, &val); in eeh_bridge_check_link()
656 eeh_ops->read_config(edev, cap + PCI_EXP_SLTCAP, 2, &val); in eeh_bridge_check_link()
658 eeh_ops->read_config(edev, cap + PCI_EXP_SLTCTL, 2, &val); in eeh_bridge_check_link()
663 eeh_ops->write_config(edev, cap + PCI_EXP_SLTCTL, 2, val); in eeh_bridge_check_link()
669 eeh_ops->read_config(edev, cap + PCI_EXP_LNKCTL, 2, &val); in eeh_bridge_check_link()
671 eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val); in eeh_bridge_check_link()
688 eeh_ops->read_config(edev, cap + PCI_EXP_LNKSTA, 2, &val); in eeh_bridge_check_link()
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| /arch/mips/boot/dts/ingenic/ |
| A D | jz4770.dtsi | 274 cap-sd-highspeed;
275 cap-mmc-highspeed;
276 cap-sdio-irq;
294 cap-sd-highspeed;
295 cap-mmc-highspeed;
296 cap-sdio-irq;
314 cap-sd-highspeed;
315 cap-mmc-highspeed;
316 cap-sdio-irq;
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| /arch/arm/boot/dts/qcom/ |
| A D | qcom-msm8660.dtsi | 366 cap-sd-highspeed;
367 cap-mmc-highspeed;
380 cap-sd-highspeed;
381 cap-mmc-highspeed;
393 cap-sd-highspeed;
394 cap-mmc-highspeed;
409 cap-sd-highspeed;
410 cap-mmc-highspeed;
422 cap-sd-highspeed;
423 cap-mmc-highspeed;
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| /arch/riscv/kvm/ |
| A D | vm.c | 213 int kvm_vm_ioctl_enable_cap(struct kvm *kvm, struct kvm_enable_cap *cap) in kvm_vm_ioctl_enable_cap() argument
215 switch (cap->cap) { in kvm_vm_ioctl_enable_cap()
217 if (cap->flags) in kvm_vm_ioctl_enable_cap()
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| /arch/arm/boot/dts/marvell/ |
| A D | kirkwood-6192.dtsi | 92 cap-sdio-irq;
93 cap-sd-highspeed;
94 cap-mmc-highspeed;
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| A D | kirkwood-6281.dtsi | 94 cap-sdio-irq;
95 cap-sd-highspeed;
96 cap-mmc-highspeed;
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