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Searched refs:clusters (Results 1 – 11 of 11) sorted by relevance

/arch/arm/common/
A Dmcpm_entry.c36 mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_GOING_DOWN; in __mcpm_cpu_going_down()
37 sync_cache_w(&mcpm_sync.clusters[cluster].cpus[cpu].cpu); in __mcpm_cpu_going_down()
50 mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_DOWN; in __mcpm_cpu_down()
51 sync_cache_w(&mcpm_sync.clusters[cluster].cpus[cpu].cpu); in __mcpm_cpu_down()
66 mcpm_sync.clusters[cluster].cluster = state; in __mcpm_outbound_leave_critical()
67 sync_cache_w(&mcpm_sync.clusters[cluster].cluster); in __mcpm_outbound_leave_critical()
137 sync_cache_r(&mcpm_sync.clusters[cluster].cluster); in __mcpm_cluster_state()
138 return mcpm_sync.clusters[cluster].cluster; in __mcpm_cluster_state()
436 mcpm_sync.clusters[i].cluster = CLUSTER_DOWN; in mcpm_sync_init()
439 mcpm_sync.clusters[i].cpus[j].cpu = CPU_DOWN; in mcpm_sync_init()
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/arch/arm/include/asm/
A Dmcpm.h298 struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS]; member
/arch/arm64/boot/dts/freescale/
A Dimx8dxl.dtsi43 /* We have 1 clusters with 2 Cortex-A35 cores */
A Dimx8qxp.dtsi61 /* We have 1 clusters with 4 Cortex-A35 cores */
A Dfsl-ls1088a.dtsi29 /* We have 2 clusters having 4 Cortex-A53 cores each */
A Dfsl-lx2160a.dtsi28 // 8 clusters having 2 Cortex-A72 cores each
/arch/arm64/boot/dts/hisilicon/
A Dhi3660-coresight.dtsi306 /* An invisible combo funnel between clusters and top funnel */
/arch/arm/
A DKconfig996 to 2 clusters by default.
997 Platforms with 3 or 4 clusters that use MCPM must select this
998 option to allow the additional clusters to be managed.
/arch/arm64/boot/dts/qcom/
A Dmsm8939.dtsi181 * consisting of two clusters of four ARM Cortex-A53s each. The
/arch/arm64/
A DKconfig1519 making when dealing with machines that have clusters of CPUs.
/arch/x86/
A DKconfig1040 making when dealing with machines that have clusters of CPUs.

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