| /arch/arm/mach-rpc/include/mach/ |
| A D | acornfb.h | 95 case 1: vidc->control |= VIDC20_CTRL_PIX_CK; break; in acornfb_vidc20_find_rates() 96 case 2: vidc->control |= VIDC20_CTRL_PIX_CK2; break; in acornfb_vidc20_find_rates() 97 case 3: vidc->control |= VIDC20_CTRL_PIX_CK3; break; in acornfb_vidc20_find_rates() 98 case 4: vidc->control |= VIDC20_CTRL_PIX_CK4; break; in acornfb_vidc20_find_rates() 99 case 5: vidc->control |= VIDC20_CTRL_PIX_CK5; break; in acornfb_vidc20_find_rates() 115 vidc->control |= VIDC20_CTRL_FIFO_24; in acornfb_vidc20_find_rates() 117 vidc->control |= VIDC20_CTRL_FIFO_28; in acornfb_vidc20_find_rates() 123 vidc->control |= VIDC20_CTRL_FIFO_16; in acornfb_vidc20_find_rates() 125 vidc->control |= VIDC20_CTRL_FIFO_20; in acornfb_vidc20_find_rates() 127 vidc->control |= VIDC20_CTRL_FIFO_24; in acornfb_vidc20_find_rates() [all …]
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| /arch/x86/kvm/svm/ |
| A D | nested.c | 744 vmcb02->control.nested_ctl = vmcb01->control.nested_ctl; in nested_vmcb02_prepare_control() 745 vmcb02->control.iopm_base_pa = vmcb01->control.iopm_base_pa; in nested_vmcb02_prepare_control() 746 vmcb02->control.msrpm_base_pa = vmcb01->control.msrpm_base_pa; in nested_vmcb02_prepare_control() 828 vmcb02->control.virt_ext = vmcb01->control.virt_ext & in nested_vmcb02_prepare_control() 852 vmcb02->control.pause_filter_count = vmcb01->control.pause_filter_count; in nested_vmcb02_prepare_control() 1114 vmcb12->control.int_state = vmcb02->control.int_state; in nested_svm_vmexit() 1115 vmcb12->control.exit_code = vmcb02->control.exit_code; in nested_svm_vmexit() 1116 vmcb12->control.exit_code_hi = vmcb02->control.exit_code_hi; in nested_svm_vmexit() 1117 vmcb12->control.exit_info_1 = vmcb02->control.exit_info_1; in nested_svm_vmexit() 1118 vmcb12->control.exit_info_2 = vmcb02->control.exit_info_2; in nested_svm_vmexit() [all …]
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| A D | svm.c | 939 struct vmcb_control_area *control = &svm->vmcb->control; in grow_ple_window() local 960 struct vmcb_control_area *control = &svm->vmcb->control; in shrink_ple_window() local 1090 struct vmcb_control_area *control = &vmcb->control; in init_vmcb() local 1547 control = &svm->vmcb->control; in svm_set_vintr() 3290 struct vmcb_control_area *control = &svm->vmcb->control; in dump_vmcb() local 3531 struct vmcb_control_area *control = &to_svm(vcpu)->vmcb->control; in svm_get_exit_info() local 3547 struct vmcb_control_area *control = &to_svm(vcpu)->vmcb->control; in svm_get_entry_info() local 4165 struct vmcb_control_area *control = &svm->vmcb->control; in svm_cancel_injection() local 4167 control->exit_int_info = control->event_inj; in svm_cancel_injection() 4168 control->exit_int_info_err = control->event_inj_err; in svm_cancel_injection() [all …]
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| A D | hyperv.c | 13 svm->vmcb->control.exit_code = HV_SVM_EXITCODE_ENL; in svm_hv_inject_synthetic_vmexit_post_tlb_flush() 14 svm->vmcb->control.exit_code_hi = 0; in svm_hv_inject_synthetic_vmexit_post_tlb_flush() 15 svm->vmcb->control.exit_info_1 = HV_SVM_ENL_EXITCODE_TRAP_AFTER_FLUSH; in svm_hv_inject_synthetic_vmexit_post_tlb_flush() 16 svm->vmcb->control.exit_info_2 = 0; in svm_hv_inject_synthetic_vmexit_post_tlb_flush()
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| A D | svm_onhyperv.h | 22 struct hv_vmcb_enlightenments *hve = &to_svm(vcpu)->vmcb->control.hv_enlightenments; in svm_hv_is_enlightened_tlb_enabled() 30 struct hv_vmcb_enlightenments *hve = &vmcb->control.hv_enlightenments; in svm_hv_init_vmcb() 32 BUILD_BUG_ON(sizeof(vmcb->control.hv_enlightenments) != in svm_hv_init_vmcb() 33 sizeof(vmcb->control.reserved_sw)); in svm_hv_init_vmcb() 74 struct hv_vmcb_enlightenments *hve = &vmcb->control.hv_enlightenments; in svm_hv_vmcb_dirty_nested_enlightenments() 82 struct hv_vmcb_enlightenments *hve = &vmcb->control.hv_enlightenments; in svm_hv_update_vp_id()
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| A D | svm.h | 401 vmcb->control.clean = 0; in vmcb_mark_all_dirty() 406 vmcb->control.clean = VMCB_ALL_CLEAN_MASK in vmcb_mark_all_clean() 412 vmcb->control.clean &= ~(1 << bit); in vmcb_mark_dirty() 483 vmcb_set_intercept(&vmcb->control, bit); in svm_set_intercept() 492 vmcb_clr_intercept(&vmcb->control, bit); in svm_clr_intercept() 524 vmcb->control.int_ctl |= V_GIF_MASK; in enable_gif() 534 vmcb->control.int_ctl &= ~V_GIF_MASK; in disable_gif() 763 svm->vmcb->control.exit_code = exit_code; in nested_svm_simple_vmexit() 764 svm->vmcb->control.exit_info_1 = 0; in nested_svm_simple_vmexit() 765 svm->vmcb->control.exit_info_2 = 0; in nested_svm_simple_vmexit() [all …]
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| A D | avic.c | 89 vmcb->control.int_ctl |= AVIC_ENABLE_MASK; in avic_activate_vmcb() 99 vmcb->control.int_ctl |= X2APIC_MODE_MASK; in avic_activate_vmcb() 111 vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID; in avic_activate_vmcb() 243 vmcb->control.avic_vapic_bar = APIC_DEFAULT_PHYS_BASE; in avic_init_vmcb() 483 u32 icrh = svm->vmcb->control.exit_info_1 >> 32; in avic_incomplete_ipi_interception() 484 u32 icrl = svm->vmcb->control.exit_info_1; in avic_incomplete_ipi_interception() 485 u32 id = svm->vmcb->control.exit_info_2 >> 32; in avic_incomplete_ipi_interception() 486 u32 index = svm->vmcb->control.exit_info_2 & 0x1FF; in avic_incomplete_ipi_interception() 684 u32 offset = svm->vmcb->control.exit_info_1 & in avic_unaccelerated_access_interception() 686 u32 vector = svm->vmcb->control.exit_info_2 & in avic_unaccelerated_access_interception() [all …]
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| /arch/arm/boot/dts/ti/keystone/ |
| A D | keystone-k2hk-clocks.dtsi | 15 reg-names = "control"; 32 reg-names = "control"; 41 reg-names = "control"; 50 reg-names = "control"; 59 reg-names = "control", "domain"; 69 reg-names = "control", "domain"; 79 reg-names = "control", "domain"; 89 reg-names = "control", "domain"; 99 reg-names = "control", "domain"; 109 reg-names = "control", "domain"; [all …]
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| A D | keystone-k2l-clocks.dtsi | 15 reg-names = "control"; 32 reg-names = "control"; 41 reg-names = "control"; 49 reg-names = "control", "domain"; 60 reg-names = "control", "domain"; 70 reg-names = "control", "domain"; 80 reg-names = "control", "domain"; 90 reg-names = "control", "domain"; 100 reg-names = "control", "domain"; 110 reg-names = "control", "domain"; [all …]
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| A D | keystone-clocks.dtsi | 166 reg-names = "control", "domain"; 177 reg-names = "control", "domain"; 187 reg-names = "control", "domain"; 198 reg-names = "control", "domain"; 208 reg-names = "control", "domain"; 218 reg-names = "control", "domain"; 228 reg-names = "control", "domain"; 238 reg-names = "control", "domain"; 248 reg-names = "control", "domain"; 258 reg-names = "control", "domain"; [all …]
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| A D | keystone-k2e-clocks.dtsi | 14 reg-names = "control", "multiplier", "post-divider"; 23 reg-names = "control"; 32 reg-names = "control"; 41 reg-names = "control", "domain"; 51 reg-names = "control", "domain"; 61 reg-names = "control", "domain"; 71 reg-names = "control", "domain";
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| /arch/x86/include/asm/ |
| A D | mshyperv.h | 78 "+c" (control), "+d" (input_address) in hv_do_hypercall() 90 "+c" (control), "+d" (input_address) in hv_do_hypercall() 106 : "A" (control), in hv_do_hypercall() 122 return hv_tdx_hypercall(control, input1, 0); in _hv_do_fast_hypercall8() 128 "+c" (control), "+d" (input1) in _hv_do_fast_hypercall8() 133 "+c" (control), "+d" (input1) in _hv_do_fast_hypercall8() 146 : "A" (control), in _hv_do_fast_hypercall8() 159 return _hv_do_fast_hypercall8(control, input1); in hv_do_fast_hypercall8() 175 "+c" (control), "+d" (input1) in _hv_do_fast_hypercall16() 182 "+c" (control), "+d" (input1) in _hv_do_fast_hypercall16() [all …]
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| A D | posted_intr.h | 29 u64 control; member 95 return test_and_set_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); in pi_test_and_set_on() 100 return test_and_clear_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); in pi_test_and_clear_on() 105 return test_and_clear_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control); in pi_test_and_clear_sn() 120 set_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control); in pi_set_sn() 125 set_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); in pi_set_on() 130 clear_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); in pi_clear_on() 135 clear_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control); in pi_clear_sn() 140 return test_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); in pi_test_on() 145 return test_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control); in pi_test_sn()
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| /arch/x86/kvm/vmx/ |
| A D | posted_intr.c | 51 if (!try_cmpxchg64(&pi_desc->control, pold, new)) in pi_try_set_control() 113 old.control = READ_ONCE(pi_desc->control); in vmx_vcpu_pi_load() 115 new.control = old.control; in vmx_vcpu_pi_load() 129 } while (pi_try_set_control(pi_desc, &old.control, new.control)); in vmx_vcpu_pi_load() 190 old.control = READ_ONCE(pi_desc->control); in pi_enable_wakeup_handler() 193 new.control = old.control; in pi_enable_wakeup_handler() 195 } while (pi_try_set_control(pi_desc, &old.control, new.control)); in pi_enable_wakeup_handler()
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| /arch/sparc/kernel/ |
| A D | psycho_common.c | 40 u64 control; in psycho_check_stc_error() local 60 control = upa_readq(strbuf->strbuf_control); in psycho_check_stc_error() 77 upa_writeq(control, strbuf->strbuf_control); in psycho_check_stc_error() 213 control = upa_readq(iommu->iommu_control); in psycho_check_iommu_error() 214 if (control & PSYCHO_IOMMU_CTRL_XLTEERR) { in psycho_check_iommu_error() 217 control &= ~PSYCHO_IOMMU_CTRL_XLTEERR; in psycho_check_iommu_error() 406 u64 control; in psycho_iommu_init() local 419 control |= PSYCHO_IOMMU_CTRL_DENAB; in psycho_iommu_init() 434 control |= PSYCHO_IOMMU_CTRL_ENAB; in psycho_iommu_init() 438 control |= PSYCHO_IOMMU_TSBSZ_64K; in psycho_iommu_init() [all …]
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| A D | pci_schizo.c | 137 u64 control; in __schizo_check_stc_error_pbm() local 246 u64 control; in schizo_check_iommu_error_pbm() local 256 control &= ~SCHIZO_IOMMU_CTRL_XLTEERR; in schizo_check_iommu_error_pbm() 1096 u64 control; in schizo_pbm_strbuf_init() local 1122 control &= ~(SCHIZO_STRBUF_CTRL_LPTR | in schizo_pbm_strbuf_init() 1125 control |= SCHIZO_STRBUF_CTRL_ENAB; in schizo_pbm_strbuf_init() 1144 u64 control; in schizo_pbm_iommu_init() local 1188 control |= SCHIZO_IOMMU_CTRL_DENAB; in schizo_pbm_iommu_init() 1214 control |= SCHIZO_IOMMU_TSBSZ_64K; in schizo_pbm_iommu_init() 1217 control |= SCHIZO_IOMMU_TSBSZ_128K; in schizo_pbm_iommu_init() [all …]
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| /arch/arm64/hyperv/ |
| A D | hv_core.c | 23 u64 hv_do_hypercall(u64 control, void *input, void *output) in hv_do_hypercall() argument 32 arm_smccc_1_1_hvc(HV_FUNC_ID, control, in hv_do_hypercall() 47 u64 control; in hv_do_fast_hypercall8() local 49 control = (u64)code | HV_HYPERCALL_FAST_BIT; in hv_do_fast_hypercall8() 51 arm_smccc_1_1_hvc(HV_FUNC_ID, control, input, &res); in hv_do_fast_hypercall8() 64 u64 control; in hv_do_fast_hypercall16() local 66 control = (u64)code | HV_HYPERCALL_FAST_BIT; in hv_do_fast_hypercall16() 68 arm_smccc_1_1_hvc(HV_FUNC_ID, control, input1, input2, &res); in hv_do_fast_hypercall16()
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| /arch/mips/pci/ |
| A D | ops-mace.c | 43 u32 control = mace->pci.control; in mace_pci_read_config() local 46 mace->pci.control = control & ~MACEPCI_CONTROL_MAR_INT; in mace_pci_read_config() 61 mace->pci.control = control; in mace_pci_read_config()
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| A D | pci-rc32434.c | 159 rc32434_pci->pcilba[0].control = in rc32434_pcibridge_init() 161 dummyread = rc32434_pci->pcilba[0].control; /* flush the CPU write Buffers */ in rc32434_pcibridge_init() 166 rc32434_pci->pcilba[1].control = in rc32434_pcibridge_init() 168 dummyread = rc32434_pci->pcilba[1].control; /* flush the CPU write Buffers */ in rc32434_pcibridge_init() 173 rc32434_pci->pcilba[2].control = in rc32434_pcibridge_init() 175 dummyread = rc32434_pci->pcilba[2].control; /* flush the CPU write Buffers */ in rc32434_pcibridge_init() 180 rc32434_pci->pcilba[3].control = in rc32434_pcibridge_init() 183 dummyread = rc32434_pci->pcilba[3].control; /* flush the CPU write Buffers */ in rc32434_pcibridge_init()
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| /arch/m68k/hp300/ |
| A D | hp300map.map | 6 # altgr control keycode 83 = Boot 7 # altgr control keycode 111 = Boot 78 control keycode 63 = nul 90 control keycode 73 = Console_4 92 control keycode 74 = Console_3 94 control keycode 75 = Console_2 96 control keycode 76 = Console_1 102 control keycode 81 = Console_5 104 control keycode 82 = Console_6 106 control keycode 83 = Console_7 [all …]
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| /arch/arm/kernel/ |
| A D | iwmmxt.h | 38 .macro tmrc, dest:req, control:req 39 mrc p1, 0, \dest, \control, c0, 0 42 .macro tmcr, control:req, src:req 43 mcr p1, 0, \src, \control, c0, 0
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| /arch/arm/boot/dts/samsung/ |
| A D | exynos5420-cpus.dtsi | 63 cci-control-port = <&cci_control1>; 75 cci-control-port = <&cci_control1>; 87 cci-control-port = <&cci_control1>; 99 cci-control-port = <&cci_control1>; 111 cci-control-port = <&cci_control0>; 123 cci-control-port = <&cci_control0>; 135 cci-control-port = <&cci_control0>; 147 cci-control-port = <&cci_control0>;
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| A D | exynos5422-cpus.dtsi | 62 cci-control-port = <&cci_control0>; 75 cci-control-port = <&cci_control0>; 88 cci-control-port = <&cci_control0>; 101 cci-control-port = <&cci_control0>; 114 cci-control-port = <&cci_control1>; 127 cci-control-port = <&cci_control1>; 140 cci-control-port = <&cci_control1>; 153 cci-control-port = <&cci_control1>;
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| /arch/arm/boot/dts/aspeed/ |
| A D | aspeed-bmc-facebook-harma.dts | 697 "presence-cpu","smi-control-n", 699 "","nmi-control-n", 700 "","nmi-control-sync-flood-n", 721 "","reset-control-bmc", 722 "","reset-control-cpu0-p0-mux", 724 "","reset-control-cpu0-p1-mux", 725 "","reset-control-e1s-mux", 729 "","reset-control-smb-e1s-1", 732 "","reset-control", 735 "","reset-control-platrst", [all …]
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| /arch/arm/mm/ |
| A D | proc-v6.S | 153 mrc p15, 0, r7, c1, c0, 1 @ auxiliary control register 154 mrc p15, 0, r8, c1, c0, 2 @ co-processor access control 155 mrc p15, 0, r9, c1, c0, 0 @ control register 175 mcr p15, 0, ip, c2, c0, 2 @ TTB control register 177 mcr p15, 0, r7, c1, c0, 1 @ auxiliary control register 178 mcr p15, 0, r8, c1, c0, 2 @ co-processor access control 180 mov r0, r9 @ control register 219 mcr p15, 0, r0, c2, c0, 2 @ TTB control register 231 mrc p15, 0, r0, c1, c0, 0 @ read control register 245 mrceq p15, 0, r5, c1, c0, 1 @ load aux control reg [all …]
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