Home
last modified time | relevance | path

Searched refs:coreid (Results 1 – 9 of 9) sorted by relevance

/arch/mips/include/asm/octeon/
A Dcvmx-ciu-defs.h14 (((coreid) & (coremask)) * offset))
48 return CVMX_CIU_ADDR(0x100100600, coreid, 0x0F, 8); in CVMX_CIU_MBOX_CLRX()
50 return CVMX_CIU_ADDR(0x000000680, coreid, 0x0F, 8); in CVMX_CIU_MBOX_CLRX()
56 return CVMX_CIU_ADDR(0x100100400, coreid, 0x0F, 8); in CVMX_CIU_MBOX_SETX()
58 return CVMX_CIU_ADDR(0x000000600, coreid, 0x0F, 8); in CVMX_CIU_MBOX_SETX()
65 return CVMX_CIU_ADDR(0x100100200, coreid, 0x0F, 8); in CVMX_CIU_PP_POKEX()
69 return CVMX_CIU_ADDR(0x000030000, coreid, 0x0F, 8) - in CVMX_CIU_PP_POKEX()
72 return CVMX_CIU_ADDR(0x000000580, coreid, 0x0F, 8); in CVMX_CIU_PP_POKEX()
80 return CVMX_CIU_ADDR(0x100100000, coreid, 0x0F, 8); in CVMX_CIU_WDOGX()
84 return CVMX_CIU_ADDR(0x000020000, coreid, 0x0F, 8) - in CVMX_CIU_WDOGX()
[all …]
A Dcvmx-pow.h290 uint64_t coreid:4; member
313 uint64_t coreid:4;
1269 load_addr.sstatus.coreid = cvmx_get_core_num(); in cvmx_pow_get_current_tag()
1295 load_addr.sstatus.coreid = cvmx_get_core_num(); in cvmx_pow_get_current_wqp()
/arch/mips/cavium-octeon/
A Dsmp.c102 int coreid = cpu_logical_map(cpu); in octeon_send_ipi_single() local
142 const int coreid = cvmx_get_core_num(); in octeon_smp_setup() local
158 __cpu_number_map[coreid] = 0; in octeon_smp_setup()
159 __cpu_logical_map[0] = coreid; in octeon_smp_setup()
307 int coreid = cpu_logical_map(cpu); in octeon_cpu_die() local
319 mask = 1 << coreid; in octeon_cpu_die()
339 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_cpu_die()
366 int coreid = cpu_logical_map(cpu); in octeon_update_boot_vector() local
380 labi->avail_coremask &= ~(1 << coreid); in octeon_update_boot_vector()
386 if (!(avail_coremask & (1 << coreid))) { in octeon_update_boot_vector()
[all …]
A Docteon-irq.c155 return cpu_number_map(coreid); in octeon_cpu_for_coreid()
1086 __set_bit(coreid, pen); in octeon_irq_ciu_wd_enable()
1106 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(coreid * 2 + 1), 1ull << coreid); in octeon_irq_ciu1_wd_enable_v2()
1336 int coreid = cvmx_get_core_num(); in octeon_irq_ip4_ciu() local
1387 int coreid = cvmx_get_core_num(); in octeon_irq_init_ciu_percpu() local
1409 int coreid = cvmx_get_core_num(); in octeon_irq_init_ciu2_percpu() local
1695 int coreid = cvmx_get_core_num(); in octeon_irq_ciu2_enable_local() local
1711 int coreid = cvmx_get_core_num(); in octeon_irq_ciu2_disable_local() local
1727 int coreid = cvmx_get_core_num(); in octeon_irq_ciu2_ack() local
1786 int coreid = cvmx_get_core_num(); in octeon_irq_ciu2_mbox_enable_local() local
[all …]
A Dsetup.c399 const int coreid = cvmx_get_core_num(); in octeon_check_cpu_bist() local
408 coreid, bist_val); in octeon_check_cpu_bist()
414 coreid, bist_val); in octeon_check_cpu_bist()
420 coreid, bist_val); in octeon_check_cpu_bist()
/arch/mips/mm/
A Dc-octeon.c314 unsigned long coreid = cvmx_get_core_num(); in co_cache_error_call_notifiers() local
318 dcache_err = cache_err_dcache[coreid]; in co_cache_error_call_notifiers()
319 cache_err_dcache[coreid] = 0; in co_cache_error_call_notifiers()
324 pr_err("Core%lu: Cache error exception:\n", coreid); in co_cache_error_call_notifiers()
/arch/openrisc/include/asm/
A Dcpuinfo.h34 u16 coreid; member
/arch/openrisc/kernel/
A Dsetup.c158 cpuinfo->coreid = mfspr(SPR_COREID); in setup_cpuinfo()
268 seq_printf(m, "processor\t\t: %d\n", cpuinfo->coreid); in show_cpuinfo()
/arch/x86/events/amd/
A Duncore.c354 DEFINE_UNCORE_FORMAT_ATTR(coreid, coreid, "config:42-44"); /* F19h L3 */

Completed in 737 milliseconds