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Searched refs:cpuinfo (Results 1 – 25 of 34) sorted by relevance

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/arch/nios2/kernel/
A Dcpuinfo.c17 struct cpuinfo cpuinfo; variable
74 if (!cpuinfo.tlb_num_ways) in setup_cpuinfo()
99 cpuinfo.tlb_num_ways_log2 = ilog2(cpuinfo.tlb_num_ways); in setup_cpuinfo()
101 cpuinfo.tlb_num_lines = cpuinfo.tlb_num_entries / cpuinfo.tlb_num_ways; in setup_cpuinfo()
128 cpuinfo.cpu_impl, in show_cpuinfo()
151 cpuinfo.icache_size >> 10, in show_cpuinfo()
152 cpuinfo.icache_line_size); in show_cpuinfo()
156 cpuinfo.dcache_size >> 10, in show_cpuinfo()
157 cpuinfo.dcache_line_size); in show_cpuinfo()
161 cpuinfo.tlb_num_ways, in show_cpuinfo()
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A Dsetup.c177 copy_exception_handler(cpuinfo.exception_addr); in setup_arch()
181 copy_fast_tlb_miss_handler(cpuinfo.fast_tlb_miss_exc_addr); in setup_arch()
A DMakefile9 obj-y += cpuinfo.o
A Dprocess.c45 pr_notice("Machine restart (%08x)...\n", cpuinfo.reset_addr); in machine_restart()
50 : "r" (cpuinfo.reset_addr) in machine_restart()
/arch/microblaze/kernel/cpu/
A Dmb.c59 cpuinfo.cpu_clock_freq / 1000000, in show_cpuinfo()
99 if (cpuinfo.use_icache) in show_cpuinfo()
102 cpuinfo.icache_size >> 10, in show_cpuinfo()
103 cpuinfo.icache_line_length); in show_cpuinfo()
107 if (cpuinfo.use_dcache) { in show_cpuinfo()
110 cpuinfo.dcache_size >> 10, in show_cpuinfo()
111 cpuinfo.dcache_line_length); in show_cpuinfo()
113 if (cpuinfo.dcache_wb) in show_cpuinfo()
123 str_yes_no(cpuinfo.hw_debug)); in show_cpuinfo()
128 cpuinfo.pvr_user1, in show_cpuinfo()
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A Dcache.c169 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_msr_irq()
196 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_nomsr_irq()
223 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_noirq()
244 CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic); in __flush_icache_all_msr_irq()
367 CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, in __invalidate_dcache_all_wb()
387 cpuinfo.dcache_line_length, cpuinfo.dcache_size); in __invalidate_dcache_range_wb()
406 cpuinfo.dcache_line_length, cpuinfo.dcache_size); in __invalidate_dcache_range_nomsr_wt()
427 cpuinfo.dcache_line_length, cpuinfo.dcache_size); in __invalidate_dcache_range_msr_irq_wt()
455 cpuinfo.dcache_line_length, cpuinfo.dcache_size); in __invalidate_dcache_range_nomsr_irq()
479 CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, in __flush_dcache_all_wb()
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A Dcpuinfo.c88 struct cpuinfo cpuinfo; variable
103 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
110 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
111 set_cpuinfo_pvr_full(&cpuinfo, cpu); in setup_cpuinfo()
115 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
118 if (cpuinfo.mmu_privins) in setup_cpuinfo()
133 cpuinfo.cpu_clock_freq = fcpu(cpu, "timebase-frequency"); in setup_cpuinfo_clk()
135 cpuinfo.cpu_clock_freq = clk_get_rate(clk); in setup_cpuinfo_clk()
138 if (!cpuinfo.cpu_clock_freq) { in setup_cpuinfo_clk()
A DMakefile13 obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o
A Dcpuinfo-pvr-full.c28 void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu) in set_cpuinfo_pvr_full()
/arch/openrisc/kernel/
A Dcacheinfo.c45 cpuinfo->dcache.ways = 1 << (dccfgr & SPR_DCCFGR_NCW); in init_cache_level()
46 cpuinfo->dcache.sets = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3); in init_cache_level()
48 cpuinfo->dcache.size = in init_cache_level()
49 cpuinfo->dcache.sets * cpuinfo->dcache.ways * cpuinfo->dcache.block_size; in init_cache_level()
53 cpuinfo->dcache.size, cpuinfo->dcache.block_size, in init_cache_level()
54 cpuinfo->dcache.sets, cpuinfo->dcache.ways); in init_cache_level()
60 cpuinfo->icache.ways = 1 << (iccfgr & SPR_ICCFGR_NCW); in init_cache_level()
63 cpuinfo->icache.size = in init_cache_level()
64 cpuinfo->icache.sets * cpuinfo->icache.ways * cpuinfo->icache.block_size; in init_cache_level()
68 cpuinfo->icache.size, cpuinfo->icache.block_size, in init_cache_level()
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A Dtime.c74 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[cpu]; in openrisc_clockevent_init() local
89 clockevents_config_and_register(evt, cpuinfo->clock_frequency, in openrisc_clockevent_init()
155 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()]; in openrisc_timer_init() local
157 if (clocksource_register_hz(&openrisc_timer, cpuinfo->clock_frequency)) in openrisc_timer_init()
A Dsetup.c102 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()]; in print_cpuinfo() local
108 version, revision, cpuinfo->clock_frequency / 1000000); in print_cpuinfo()
144 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[cpu_id]; in setup_cpuinfo() local
151 &cpuinfo->clock_frequency)) { in setup_cpuinfo()
158 cpuinfo->coreid = mfspr(SPR_COREID); in setup_cpuinfo()
267 struct cpuinfo_or1k *cpuinfo = v; in show_cpuinfo() local
268 seq_printf(m, "processor\t\t: %d\n", cpuinfo->coreid); in show_cpuinfo()
/arch/mips/include/asm/
A Dcpu-info.h152 static inline unsigned int cpu_cluster(struct cpuinfo_mips *cpuinfo) in cpu_cluster() argument
158 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CLUSTER) >> in cpu_cluster()
162 static inline unsigned int cpu_core(struct cpuinfo_mips *cpuinfo) in cpu_core() argument
164 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CORE) >> in cpu_core()
168 static inline unsigned int cpu_vpe_id(struct cpuinfo_mips *cpuinfo) in cpu_vpe_id() argument
174 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_VP) >> in cpu_vpe_id()
179 extern void cpu_set_core(struct cpuinfo_mips *cpuinfo, unsigned int core);
204 static inline unsigned long cpu_asid_mask(struct cpuinfo_mips *cpuinfo) in cpu_asid_mask() argument
207 return cpuinfo->asid_mask; in cpu_asid_mask()
212 static inline void set_cpu_asid_mask(struct cpuinfo_mips *cpuinfo, in set_cpu_asid_mask() argument
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/arch/nios2/mm/
A Dcacheflush.c23 start &= ~(cpuinfo.dcache_line_size - 1); in __flush_dcache()
24 end += (cpuinfo.dcache_line_size - 1); in __flush_dcache()
25 end &= ~(cpuinfo.dcache_line_size - 1); in __flush_dcache()
27 if (end > start + cpuinfo.dcache_size) in __flush_dcache()
28 end = start + cpuinfo.dcache_size; in __flush_dcache()
43 end += (cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
44 end &= ~(cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
59 end += (cpuinfo.icache_line_size - 1); in __flush_icache()
60 end &= ~(cpuinfo.icache_line_size - 1); in __flush_icache()
62 if (end > start + cpuinfo.icache_size) in __flush_icache()
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A Dtlb.c22 ((((1UL << (cpuinfo.tlb_ptr_sz - cpuinfo.tlb_num_ways_log2))) - 1) \
55 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in replace_tlb_one_pid()
136 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_one()
174 line << (PAGE_SHIFT + cpuinfo.tlb_num_ways_log2)); in dump_tlb_line()
181 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in dump_tlb_line()
213 for (i = 0; i < cpuinfo.tlb_num_lines; i++) in dump_tlb()
227 for (line = 0; line < cpuinfo.tlb_num_lines; line++) { in flush_tlb_pid()
230 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_pid()
279 for (line = 0; line < cpuinfo.tlb_num_lines; line++) { in flush_tlb_all()
281 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_all()
A Dmmu_context.c21 #define PID_BITS (cpuinfo.tlb_pid_num_bits)
/arch/microblaze/include/asm/
A Dcpuinfo.h30 struct cpuinfo { struct
87 extern struct cpuinfo cpuinfo; argument
93 void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu);
94 void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
/arch/loongarch/include/asm/
A Dcpu-info.h93 static inline unsigned long cpu_asid_mask(struct cpuinfo_loongarch *cpuinfo) in cpu_asid_mask() argument
95 return cpuinfo->asid_mask; in cpu_asid_mask()
98 static inline void set_cpu_asid_mask(struct cpuinfo_loongarch *cpuinfo, in set_cpu_asid_mask() argument
101 cpuinfo->asid_mask = asid_mask; in set_cpu_asid_mask()
/arch/nios2/include/asm/
A Dcpuinfo.h11 struct cpuinfo { struct
42 extern struct cpuinfo cpuinfo; argument
A Dregisters.h48 #define TLBMISC_PID_MASK ((1UL << cpuinfo.tlb_pid_num_bits) - 1)
/arch/parisc/kernel/
A Dtopology.c51 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu); in store_cpu_topology() local
56 if (cpuinfo->cpu_loc == p->cpu_loc) { in store_cpu_topology()
/arch/um/os-Linux/
A Dstart_up.c396 FILE *cpuinfo; in get_host_cpu_features() local
401 cpuinfo = fopen("/proc/cpuinfo", "r"); in get_host_cpu_features()
402 if (cpuinfo == NULL) { in get_host_cpu_features()
405 while ((getline(&line, &len, cpuinfo)) != -1) { in get_host_cpu_features()
419 fclose(cpuinfo); in get_host_cpu_features()
/arch/microblaze/kernel/
A Dasm-offsets.c124 DEFINE(CI_DCS, offsetof(struct cpuinfo, dcache_size)); in main()
125 DEFINE(CI_DCL, offsetof(struct cpuinfo, dcache_line_length)); in main()
126 DEFINE(CI_ICS, offsetof(struct cpuinfo, icache_size)); in main()
127 DEFINE(CI_ICL, offsetof(struct cpuinfo, icache_line_length)); in main()
/arch/mips/kernel/
A Dcpu-probe.c2020 void cpu_set_cluster(struct cpuinfo_mips *cpuinfo, unsigned int cluster) in cpu_set_cluster() argument
2026 cpuinfo->globalnumber &= ~MIPS_GLOBALNUMBER_CLUSTER; in cpu_set_cluster()
2027 cpuinfo->globalnumber |= cluster << MIPS_GLOBALNUMBER_CLUSTER_SHF; in cpu_set_cluster()
2030 void cpu_set_core(struct cpuinfo_mips *cpuinfo, unsigned int core) in cpu_set_core() argument
2035 cpuinfo->globalnumber &= ~MIPS_GLOBALNUMBER_CORE; in cpu_set_core()
2036 cpuinfo->globalnumber |= core << MIPS_GLOBALNUMBER_CORE_SHF; in cpu_set_core()
2039 void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo, unsigned int vpe) in cpu_set_vpe_id() argument
2048 cpuinfo->globalnumber &= ~MIPS_GLOBALNUMBER_VP; in cpu_set_vpe_id()
2049 cpuinfo->globalnumber |= vpe << MIPS_GLOBALNUMBER_VP_SHF; in cpu_set_vpe_id()
/arch/powerpc/platforms/
A DKconfig200 on-die temperature in /proc/cpuinfo if the cpu supports it.
203 don't assume the cpu temp is actually what /proc/cpuinfo says it is.
222 bound in /proc/cpuinfo. If the range is large, the temperature is
227 /proc/cpuinfo.

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