Home
last modified time | relevance | path

Searched refs:csr_read (Results 1 – 20 of 20) sorted by relevance

/arch/riscv/kernel/
A Dsuspend.c18 context->envcfg = csr_read(CSR_ENVCFG); in suspend_save_csrs()
19 context->tvec = csr_read(CSR_TVEC); in suspend_save_csrs()
20 context->ie = csr_read(CSR_IE); in suspend_save_csrs()
34 context->stimecmp = csr_read(CSR_STIMECMP); in suspend_save_csrs()
36 context->stimecmph = csr_read(CSR_STIMECMPH); in suspend_save_csrs()
40 context->satp = csr_read(CSR_SATP); in suspend_save_csrs()
A Dcpu.c150 ci->marchid = csr_read(CSR_MARCHID); in riscv_get_marchid()
164 ci->mvendorid = csr_read(CSR_MVENDORID); in riscv_get_mvendorid()
209 ci->mvendorid = csr_read(CSR_MVENDORID); in riscv_cpuinfo_starting()
211 ci->marchid = csr_read(CSR_MARCHID); in riscv_cpuinfo_starting()
212 ci->mimpid = csr_read(CSR_MIMPID); in riscv_cpuinfo_starting()
A Dalternative.c35 cpu_mfr_info->vendor_id = csr_read(CSR_MVENDORID); in riscv_fill_cpu_mfr_info()
36 cpu_mfr_info->arch_id = csr_read(CSR_MARCHID); in riscv_fill_cpu_mfr_info()
37 cpu_mfr_info->imp_id = csr_read(CSR_MIMPID); in riscv_fill_cpu_mfr_info()
A Dprocess.c127 unsigned long tmp = csr_read(CSR_STATUS); in compat_mode_detect()
131 (csr_read(CSR_STATUS) & SR_UXL) == SR_UXL_32; in compat_mode_detect()
A Dvector.c48 this_vsize = csr_read(CSR_VLENB) * 32; in riscv_v_setup_vsize()
A Dhibernate.c102 hdr->saved_satp = csr_read(CSR_SATP); in arch_hibernation_header_save()
/arch/riscv/kvm/
A Daia.c168 csr->vsiselect = csr_read(CSR_VSISELECT); in kvm_riscv_vcpu_aia_put()
169 csr->hviprio1 = csr_read(CSR_HVIPRIO1); in kvm_riscv_vcpu_aia_put()
170 csr->hviprio2 = csr_read(CSR_HVIPRIO2); in kvm_riscv_vcpu_aia_put()
172 csr->vsieh = csr_read(CSR_VSIEH); in kvm_riscv_vcpu_aia_put()
173 csr->hviph = csr_read(CSR_HVIPH); in kvm_riscv_vcpu_aia_put()
174 csr->hviprio1h = csr_read(CSR_HVIPRIO1H); in kvm_riscv_vcpu_aia_put()
175 csr->hviprio2h = csr_read(CSR_HVIPRIO2H); in kvm_riscv_vcpu_aia_put()
460 hgei_mask = csr_read(CSR_HGEIP) & csr_read(CSR_HGEIE); in hgei_interrupt()
598 if (csr_read(CSR_HGEIE) & BIT(i)) { in kvm_riscv_aia_disable()
622 kvm_riscv_aia_nr_hgei = fls_long(csr_read(CSR_HGEIE)); in kvm_riscv_aia_init()
A Dvcpu.c674 csr->vsie = csr_read(CSR_VSIE); in kvm_arch_vcpu_put()
675 csr->vstvec = csr_read(CSR_VSTVEC); in kvm_arch_vcpu_put()
677 csr->vsepc = csr_read(CSR_VSEPC); in kvm_arch_vcpu_put()
678 csr->vscause = csr_read(CSR_VSCAUSE); in kvm_arch_vcpu_put()
679 csr->vstval = csr_read(CSR_VSTVAL); in kvm_arch_vcpu_put()
680 csr->hvip = csr_read(CSR_HVIP); in kvm_arch_vcpu_put()
681 csr->vsatp = csr_read(CSR_VSATP); in kvm_arch_vcpu_put()
851 trap->htval = csr_read(CSR_HTVAL); in kvm_riscv_vcpu_enter_exit()
852 trap->htinst = csr_read(CSR_HTINST); in kvm_riscv_vcpu_enter_exit()
856 trap->scause = csr_read(CSR_SCAUSE); in kvm_riscv_vcpu_enter_exit()
[all …]
A Dvmid.c30 old = csr_read(CSR_HGATP); in kvm_riscv_gstage_vmid_detect()
32 vmid_bits = csr_read(CSR_HGATP); in kvm_riscv_gstage_vmid_detect()
A Daia_imsic.c66 __r = csr_read(CSR_VSIREG); \
380 old_vsiselect = csr_read(CSR_VSISELECT); in imsic_vsfile_local_read()
381 old_hstatus = csr_read(CSR_HSTATUS); in imsic_vsfile_local_read()
452 old_vsiselect = csr_read(CSR_VSISELECT); in imsic_vsfile_local_rw()
453 old_hstatus = csr_read(CSR_HSTATUS); in imsic_vsfile_local_rw()
529 old_vsiselect = csr_read(CSR_VSISELECT); in imsic_vsfile_local_clear()
530 old_hstatus = csr_read(CSR_HSTATUS); in imsic_vsfile_local_clear()
567 old_vsiselect = csr_read(CSR_VSISELECT); in imsic_vsfile_local_update()
568 old_hstatus = csr_read(CSR_HSTATUS); in imsic_vsfile_local_update()
693 ret = !!(csr_read(CSR_HGEIP) & BIT(imsic->vsfile_hgei)); in kvm_riscv_vcpu_aia_imsic_has_interrupt()
A Dgstage.c321 if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV57X4) { in kvm_riscv_gstage_mode_detect()
329 if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV48X4) { in kvm_riscv_gstage_mode_detect()
/arch/riscv/include/asm/
A Dvector.h125 return !!(csr_read(CSR_SSTATUS) & SR_VS); in riscv_v_is_on()
154 dest->vcsr = csr_read(CSR_VXSAT) | csr_read(CSR_VXRM) << CSR_VXRM_SHIFT; in __vstate_csr_save()
161 dest->vcsr = csr_read(CSR_VCSR); in __vstate_csr_save()
162 dest->vlenb = csr_read(CSR_VLENB); in __vstate_csr_save()
177 unsigned long status = csr_read(CSR_SSTATUS); in __vstate_csr_restore()
A Dtimex.h53 return csr_read(CSR_TIME); in get_cycles()
59 return csr_read(CSR_TIMEH); in get_cycles_hi()
A Dirqflags.h15 return csr_read(CSR_STATUS); in arch_local_save_flags()
A Dkvm_nacl.h217 __r = csr_read(__csr); \
A Dcsr.h527 #define csr_read(csr) \ macro
/arch/riscv/include/asm/vdso/
A Dgettimeofday.h79 return csr_read(CSR_TIME); in __arch_get_hw_counter()
/arch/riscv/mm/
A Dcontext.c232 old = csr_read(CSR_SATP); in asids_init()
235 asid_bits = (csr_read(CSR_SATP) >> SATP_ASID_SHIFT) & SATP_ASID_MASK; in asids_init()
A Dfault.c191 pfn = csr_read(CSR_SATP) & SATP_PPN; in vmalloc_fault()
/arch/riscv/errata/thead/
A Derrata.c40 if (!(csr_read(CSR_TH_SXSTATUS) & SXSTATUS_MAEE)) in errata_probe_mae()

Completed in 36 milliseconds