Searched refs:ctrl_base (Results 1 – 6 of 6) sorted by relevance
| /arch/arm/mach-hisi/ |
| A D | hotplug.c | 72 static void __iomem *ctrl_base; variable
124 ctrl_base + SCISOEN); in set_cpu_hi3620()
152 ctrl_base = of_iomap(node, 0); in hi3xxx_hotplug_init()
154 if (!ctrl_base) { in hi3xxx_hotplug_init()
165 if (!ctrl_base) { in hi3xxx_set_cpu()
182 ctrl_base = of_iomap(np, 0); in hix5hd2_hotplug_init()
184 if (!ctrl_base) in hix5hd2_hotplug_init()
194 if (!ctrl_base) in hix5hd2_set_cpu()
227 if (!ctrl_base) { in hip01_set_cpu()
230 ctrl_base = of_iomap(np, 0); in hip01_set_cpu()
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| A D | platsmp.c | 21 static void __iomem *ctrl_base; variable
26 if (!cpu || !ctrl_base) in hi3xxx_set_cpu_jump()
34 if (!cpu || !ctrl_base) in hi3xxx_get_cpu_jump()
36 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
62 if (!ctrl_base) { in hi3xxx_smp_prepare_cpus()
68 ctrl_base = of_iomap(np, 0); in hi3xxx_smp_prepare_cpus()
69 if (!ctrl_base) { in hi3xxx_smp_prepare_cpus()
79 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
165 ctrl_base = of_iomap(node, 0); in hip01_boot_secondary()
169 remap_reg_value = readl_relaxed(ctrl_base + REG_SC_CTRL); in hip01_boot_secondary()
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| /arch/arm/mach-omap2/ |
| A D | omap_phy_internal.c | 35 void __iomem *ctrl_base; in omap4430_phy_power_down() local
40 ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); in omap4430_phy_power_down()
41 if (!ctrl_base) { in omap4430_phy_power_down()
47 writel_relaxed(PHY_PD, ctrl_base + CONTROL_DEV_CONF); in omap4430_phy_power_down()
49 iounmap(ctrl_base); in omap4430_phy_power_down()
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| /arch/mips/pci/ |
| A D | pci-ar724x.c | 41 void __iomem *ctrl_base; member
60 reset = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET); in ar724x_pci_check_link()
236 base = apc->ctrl_base; in ar724x_pci_irq_handler()
256 base = apc->ctrl_base; in ar724x_pci_irq_unmask()
277 base = apc->ctrl_base; in ar724x_pci_irq_mask()
311 base = apc->ctrl_base; in ar724x_pci_irq_init()
349 app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); in ar724x_pci_hw_init()
351 __raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP); in ar724x_pci_hw_init()
375 apc->ctrl_base = devm_platform_ioremap_resource_byname(pdev, "ctrl_base"); in ar724x_pci_probe()
376 if (IS_ERR(apc->ctrl_base)) in ar724x_pci_probe()
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| /arch/arm/mm/ |
| A D | cache-uniphier.c | 75 void __iomem *ctrl_base; member
226 writel_relaxed(val, data->ctrl_base + UNIPHIER_SSCC); in __uniphier_cache_enable()
376 data->ctrl_base = of_iomap(np, 0); in __uniphier_cache_init()
377 if (!data->ctrl_base) { in __uniphier_cache_init()
397 data->way_ctrl_base = data->ctrl_base + 0xc00; in __uniphier_cache_init()
414 data->way_ctrl_base = data->ctrl_base + 0x870; in __uniphier_cache_init()
418 data->way_ctrl_base = data->ctrl_base + 0x840; in __uniphier_cache_init()
447 iounmap(data->ctrl_base); in __uniphier_cache_init()
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| /arch/arm/kernel/ |
| A D | hw_breakpoint.c | 330 int i, max_slots, ctrl_base, val_base; in arch_install_hw_breakpoint() local
338 ctrl_base = ARM_BASE_BCR; in arch_install_hw_breakpoint()
344 ctrl_base = ARM_BASE_WCR; in arch_install_hw_breakpoint()
370 ctrl_base = ARM_BASE_BCR + core_num_brps; in arch_install_hw_breakpoint()
379 write_wb_reg(ctrl_base + i, ctrl); in arch_install_hw_breakpoint()
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