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Searched refs:d3 (Results 1 – 25 of 70) sorted by relevance

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/arch/m68k/ifpsp060/src/
A Ditest.S177 mulu.l %d1,%d2:%d3
201 mulu.l %d1,%d2:%d3
247 mulu.l %d1,%d2:%d3
271 mulu.l %d1,%d2:%d3
295 mulu.l %d1,%d2:%d3
1288 mov.w (%a0),%d3
1315 mov.w (%a0),%d3
1343 mov.l (%a0),%d3
1370 mov.l (%a0),%d3
1398 mov.l (%a0),%d3
[all …]
A Dilsp.S345 swap %d3
367 swap %d3
407 swap %d3
408 clr.w %d3 # %d3 now ls word of divisor
412 clr.w %d3 # %d3 now ms word of divisor
456 swap %d3
461 mulu.w %d4, %d3 # %d3 <- msw*msw
547 mov.l %d0,%d3 # mr in d3
549 swap %d3 # hi(mr) in lo d3
673 mov.l %d0,%d3 # mr in d3
[all …]
/arch/x86/lib/
A Dstring_32.c36 int d0, d1, d2, d3; in strncpy() local
45 : "=&S" (d0), "=&D" (d1), "=&c" (d2), "=&a" (d3) in strncpy()
55 int d0, d1, d2, d3; in strcat() local
62 : "=&S" (d0), "=&D" (d1), "=&a" (d2), "=&c" (d3) in strcat()
72 int d0, d1, d2, d3; in strncat() local
84 : "=&S" (d0), "=&D" (d1), "=&a" (d2), "=&c" (d3) in strncat()
/arch/m68k/fpsp040/
A Dbinstr.S7 | Input: 64-bit binary integer in d2:d3, desired length (LEN) in
26 | Copy the fraction in d2:d3 to d4:d5.
36 | into d2:d3. D1 will contain the bcd digit formed.
52 | d3: lower 32-bits of fraction for mul by 8
81 | A2. Copy d2:d3 to d4:d5. Start loop.
85 movel %d3,%d5 |to d4:d5
87 | A3. Multiply d2:d3 by 8; extract msbs into d1.
91 bfextu %d3{#0:#3},%d6 |copy 3 msbs of d3 into d6
92 asll #3,%d3 |shift d3 left by 3 places
93 orl %d6,%d2 |or in msbs from d3 into d2
[all …]
A Dsgetem.S118 movel %d3,-(%a7) |save d3
120 bfffo %d0{#0:#32},%d3 |find first 1 in ls mant to d0
121 lsll %d3,%d0 |shift first 1 to integer bit in ms mant
122 movel (%a7)+,%d3 |restore d3
126 moveml %d3/%d5/%d6,-(%a7) |save registers
127 bfffo %d0{#0:#32},%d3 |find first 1 in ls mant to d0
128 lsll %d3,%d0 |shift ms mant until j-bit is set
130 lsll %d3,%d1 |shift ls mant by count
132 subl %d3,%d5 |sub 32 from shift for ls mant
136 moveml (%a7)+,%d3/%d5/%d6 |restore registers
A Dsrem_mod.S111 movew (%a0),%d3
119 tstl %d3
129 subil #32,%d3
140 subl %d6,%d3
252 addl %d3,%d3 | ...Q := 2Q
370 swap %d3
373 orl %d3,%d6
392 addql #1,%d3
396 lsll %d0,%d3
400 clrl %d3
[all …]
A Ddecbin.S136 | (*) d3: offset pointer
145 moveql #ESTRT,%d3 |counter to pick up digits
154 bfextu %d4{%d3:#4},%d0 |get the digit and zero extend into d0
156 addqb #4,%d3 |advance d3 to the next digit
432 bfextu %d3{#26:#2},%d2 |isolate rounding mode bits
439 clrl %d3 |clear d3 to force no exc and extended
440 bfins %d0,%d3{#26:#2} |stuff new rounding bits in FPCR
441 fmovel %d3,%FPCR |write new FPCR
459 clrl %d3 |table index
464 fmulx (%a1,%d3),%fp1 |mul by 10**(d3_bit_no)
[all …]
/arch/arm/crypto/
A Dblake2b-neon-core.S82 vadd.u64 d3, d3, M_\s6
116 vadd.u64 d3, d3, M_\s7
158 vadd.u64 d3, d3, d4
162 vadd.u64 d3, d3, M_\s14
168 veor d14, d14, d3
198 vadd.u64 d3, d3, d4
202 vadd.u64 d3, d3, M_\s15
209 veor d14, d14, d3
A Dcurve25519-core.S174 vtrn.32 d3, d11
181 vmov.i64 d3, #0
194 vmov.i64 d3, #0
411 vtrn.32 d17, d3
431 vtrn.32 d17, d3
447 vtrn.32 d5, d3
706 vtrn.32 d3, d7
726 vtrn.32 d1, d3
1018 vtrn.32 d3, d7
1604 vrev64.i32 d3, d3
[all …]
/arch/nios2/kernel/
A Dmisaligned.c70 u8 a, b, d0, d1, d2, d3; in handle_unaligned_c() local
123 d3 = val >> 24; in handle_unaligned_c()
131 *(u8 *)(addr+3) = d3; in handle_unaligned_c()
136 fault |= __put_user(d3, (u8 *)(addr+3)); in handle_unaligned_c()
143 fault |= __get_user(d3, (u8 *)(addr+3)); in handle_unaligned_c()
144 val = (d3 << 24) | (d2 << 16) | (d1 << 8) | d0; in handle_unaligned_c()
/arch/powerpc/kernel/vdso/
A Dvgetrandom-chacha.S52 .macro quarterround4 a1 b1 c1 d1 a2 b2 c2 d2 a3 b3 c3 d3 a4 b4 c4 d4
59 xor \d3, \d3, \a3
63 rotlwi \d3, \d3, 16
67 add \c3, \c3, \d3
83 xor \d3, \d3, \a3
87 rotlwi \d3, \d3, 8
91 add \c3, \c3, \d3
103 #define QUARTERROUND4(a1,b1,c1,d1,a2,b2,c2,d2,a3,b3,c3,d3,a4,b4,c4,d4) \ argument
106 state##a3 state##b3 state##c3 state##d3 \
/arch/m68k/lib/
A Dudivsi3.S70 #define d3 REG (d3) macro
146 movl d2,d3 | subtract b from p, store in tmp.
147 subl d1,d3
150 movl d3,d2 | and store tmp in p.
A Dmulsi3.S70 #define d3 REG (d3) macro
A Dumodsi3.S70 #define d3 REG (d3) macro
/arch/x86/kernel/
A Dprocess_32.c63 unsigned long d0, d1, d2, d3, d6, d7; in __show_regs() local
90 get_debugreg(d3, 3); in __show_regs()
95 if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) && in __show_regs()
100 log_lvl, d0, d1, d2, d3); in __show_regs()
/arch/x86/crypto/
A Daria-gfni-avx512-asm_64.S69 a3, b3, c3, d3, \ argument
72 vmovdqu64 d3, st1; \
76 vmovdqu64 st1, d3; \
99 vpshufb a0, d3, d3; \
100 vmovdqu64 d3, st1; \
101 vmovdqu64 st0, d3; \
108 vmovdqu64 st1, d3; \
121 a3, b3, c3, d3, \ argument
124 vmovdqu64 d3, st1; \
128 vmovdqu64 st1, d3; \
[all …]
A Daria-aesni-avx-asm_64.S69 a3, b3, c3, d3, \ argument
72 vmovdqu d3, st1; \
76 vmovdqu st1, d3; \
99 vpshufb a0, d3, d3; \
100 vmovdqu d3, st1; \
101 vmovdqu st0, d3; \
108 vmovdqu st1, d3; \
124 vmovdqu d3, st1; \
128 vmovdqu st1, d3; \
151 vpshufb a0, d3, d3; \
[all …]
/arch/arm/boot/dts/st/
A Dstih407-clock.dtsi187 clockgen-d3@9107000 {
191 clk_s_d3_quadfs: clk-s-d3-quadfs {
193 compatible = "st,quadfs-d3";
198 clk_s_d3_flexgen: clk-s-d3-flexgen {
200 compatible = "st,flexgen", "st,flexgen-stih407-d3";
A Dstih410-clock.dtsi192 clockgen-d3@9107000 {
196 clk_s_d3_quadfs: clk-s-d3-quadfs {
198 compatible = "st,quadfs-d3";
203 clk_s_d3_flexgen: clk-s-d3-flexgen {
205 compatible = "st,flexgen", "st,flexgen-stih407-d3";
A Dstih418-clock.dtsi192 clockgen-d3@9107000 {
196 clk_s_d3_quadfs: clk-s-d3-quadfs {
198 compatible = "st,quadfs-d3";
203 clk_s_d3_flexgen: clk-s-d3-flexgen {
205 compatible = "st,flexgen", "st,flexgen-stih407-d3";
/arch/m68k/coldfire/
A Dentry.S54 mov.l #sys_ni_syscall,%d3
66 movel %a0@(%d0),%d3
78 movel %d3,%a0
92 movel %d3,%a0
/arch/m68k/kernel/
A Dhead.S784 movel %a0@,%d3
786 movel %d3,%a0@
814 movel %a0@,%d3
1686 6: tstl %d3
1688 subq #1,%d3
3609 lslb #1,%d3
3665 cmpb #1,%d3
3682 cmpb #2,%d3
3704 cmpb #4,%d3
3734 cmpb #8,%d3
[all …]
/arch/arm/boot/dts/microchip/
A Dsama5d31ek.dts43 led-d3 {
44 label = "d3";
A Dsama5d34ek.dts53 led-d3 {
54 label = "d3";
/arch/m68k/include/asm/
A Delf.h65 (_r)->d3 = _exec_map_addr; \
91 pr_reg[2] = regs->d3; \

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