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Searched refs:dcr_write (Results 1 – 4 of 4) sorted by relevance

/arch/powerpc/platforms/44x/
A Dpci.c1357 dcr_write(port->dcrs, DCRO_PEGPL_CFGBAH, in ppc4xx_pciex_port_init_mapping()
1359 dcr_write(port->dcrs, DCRO_PEGPL_CFGBAL, in ppc4xx_pciex_port_init_mapping()
1366 dcr_write(port->dcrs, DCRO_PEGPL_REGBAH, in ppc4xx_pciex_port_init_mapping()
1368 dcr_write(port->dcrs, DCRO_PEGPL_REGBAL, in ppc4xx_pciex_port_init_mapping()
1375 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, 0); in ppc4xx_pciex_port_init_mapping()
1378 dcr_write(port->dcrs, DCRO_PEGPL_MSGMSK, 0); in ppc4xx_pciex_port_init_mapping()
1637 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, in ppc4xx_setup_one_pciex_POM()
1644 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, in ppc4xx_setup_one_pciex_POM()
1648 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, in ppc4xx_setup_one_pciex_POM()
1658 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, in ppc4xx_setup_one_pciex_POM()
[all …]
A Dcpm.c70 dcr_write(cpm.dcr_host, cpm.dcr_offset[cpm_reg], value | mask); in cpm_set()
103 dcr_write(cpm.dcr_host, cpm.dcr_offset[CPM_ER], er_save); in cpm_idle_sleep()
/arch/powerpc/include/asm/
A Ddcr.h20 #define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value) macro
/arch/powerpc/sysdev/
A Dmpic.c200 dcr_write(rb->dhost, reg, value); in _mpic_write()

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