| /arch/arm/boot/dts/broadcom/ |
| A D | bcm7445.dtsi | 239 memc-ddr@2000 {
241 "brcm,brcmstb-memc-ddr";
245 ddr-phy@6000 {
246 compatible = "brcm,brcmstb-ddr-phy-v240.1";
262 memc-ddr@2000 {
264 "brcm,brcmstb-memc-ddr";
268 ddr-phy@6000 {
269 compatible = "brcm,brcmstb-ddr-phy-v240.1";
285 memc-ddr@2000 {
287 "brcm,brcmstb-memc-ddr";
[all …]
|
| /arch/mips/rb532/ |
| A D | prom.c | 103 struct ddr_ram __iomem *ddr; in prom_init() local
107 ddr = ioremap(ddr_reg[0].start, in prom_init()
110 if (!ddr) { in prom_init()
115 ddrbase = (phys_addr_t)&ddr->ddrbase; in prom_init()
116 memsize = (phys_addr_t)&ddr->ddrmask; in prom_init()
|
| /arch/mips/boot/dts/qca/ |
| A D | ar9132.dtsi | 28 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
52 compatible = "qca,ar9132-ddr-controller",
53 "qca,ar7240-ddr-controller";
56 #qca,ddr-wb-channel-cells = <1>;
98 clock-output-names = "cpu", "ddr", "ahb";
|
| A D | ar9331.dtsi | 28 qca,ddr-wb-channel-interrupts = <2>, <3>;
29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
56 compatible = "qca,ar7240-ddr-controller";
59 #qca,ddr-wb-channel-cells = <1>;
|
| /arch/arm64/boot/dts/freescale/ |
| A D | imx8dxl-ss-ddr.dtsi | 7 compatible = "fsl,imx8dxl-ddr-pmu", "fsl,imx8-ddr-pmu";
|
| A D | imx8-ss-ddr.dtsi | 13 ddr_pmu0: ddr-pmu@5c020000 {
14 compatible = "fsl,imx8-ddr-pmu";
|
| /arch/arm/boot/dts/samsung/ |
| A D | exynos5260-xyref5260.dts | 97 mmc-ddr-1_8v;
100 samsung,dw-mshc-ddr-timing = <0 2>;
112 samsung,dw-mshc-ddr-timing = <1 2>;
|
| A D | exynos5410-smdk5410.dts | 69 mmc-ddr-1_8v;
72 samsung,dw-mshc-ddr-timing = <1 2>;
82 samsung,dw-mshc-ddr-timing = <1 2>;
|
| /arch/riscv/boot/dts/sophgo/ |
| A D | cv1812h-huashan-pi.dts | 50 mmc-ddr-1_8v;
51 mmc-ddr-3_3v;
|
| /arch/mips/boot/dts/brcm/ |
| A D | bcm7425.dtsi | 544 memc-ddr@2000 {
545 compatible = "brcm,brcmstb-memc-ddr";
549 ddr-phy@6000 {
550 compatible = "brcm,brcmstb-ddr-phy";
555 compatible = "brcm,brcmstb-ddr-shimphy";
571 memc-ddr@2000 {
572 compatible = "brcm,brcmstb-memc-ddr";
576 ddr-phy@6000 {
577 compatible = "brcm,brcmstb-ddr-phy";
582 compatible = "brcm,brcmstb-ddr-shimphy";
|
| A D | bcm7435.dtsi | 560 memc-ddr@2000 {
561 compatible = "brcm,brcmstb-memc-ddr";
565 ddr-phy@6000 {
566 compatible = "brcm,brcmstb-ddr-phy";
571 compatible = "brcm,brcmstb-ddr-shimphy";
587 memc-ddr@2000 {
588 compatible = "brcm,brcmstb-memc-ddr";
592 ddr-phy@6000 {
593 compatible = "brcm,brcmstb-ddr-phy";
598 compatible = "brcm,brcmstb-ddr-shimphy";
|
| A D | bcm7360.dtsi | 452 memc-ddr@2000 {
453 compatible = "brcm,brcmstb-memc-ddr";
457 ddr-phy@6000 {
458 compatible = "brcm,brcmstb-ddr-phy";
463 compatible = "brcm,brcmstb-ddr-shimphy";
|
| A D | bcm7362.dtsi | 448 memc-ddr@2000 {
449 compatible = "brcm,brcmstb-memc-ddr";
453 ddr-phy@6000 {
454 compatible = "brcm,brcmstb-ddr-phy";
459 compatible = "brcm,brcmstb-ddr-shimphy";
|
| A D | bcm7346.dtsi | 533 memc-ddr@2000 {
534 compatible = "brcm,brcmstb-memc-ddr";
538 ddr-phy@6000 {
539 compatible = "brcm,brcmstb-ddr-phy";
544 compatible = "brcm,brcmstb-ddr-shimphy";
|
| /arch/arm/boot/dts/st/ |
| A D | stm32mp157a-icore-stm32mp1.dtsi | 90 vdd_ddr: regulator-vdd-ddr {
98 vtt_ddr: regulator-vtt-ddr {
107 vref_ddr: regulator-vref-ddr {
|
| /arch/arm/boot/dts/nvidia/ |
| A D | tegra30-cardhu-a04.dts | 19 ddr_reg: regulator-ddr {
21 regulator-name = "ddr";
|
| /arch/arm64/boot/dts/allwinner/ |
| A D | sun50i-h5-libretech-all-h3-cc.dts | 16 mmc-ddr-3_3v;
|
| /arch/arm/boot/dts/rockchip/ |
| A D | rk3288-tinker-s.dts | 23 mmc-ddr-1_8v;
|
| A D | rk3228-evb.dts | 33 mmc-ddr-1_8v;
|
| /arch/arm64/boot/dts/rockchip/ |
| A D | rk3328-nanopi-r2c-plus.dts | 26 mmc-ddr-1_8v;
|
| /arch/arm64/boot/dts/broadcom/northstar2/ |
| A D | ns2-clock.dtsi | 43 compatible = "brcm,ns2-lcpll-ddr";
49 "ddr", "ddr_ch2_unused",
|
| /arch/arm64/boot/dts/qcom/ |
| A D | ipq5332-rdp474.dts | 27 mmc-ddr-1_8v;
|
| A D | ipq9574-rdp418.dts | 22 mmc-ddr-1_8v;
|
| /arch/riscv/boot/dts/microchip/ |
| A D | mpfs-polarberry.dts | 66 mmc-ddr-1_8v;
|
| /arch/mips/boot/dts/mobileye/ |
| A D | eyeq6h.dtsi | 120 mmc-ddr-1_8v;
128 cdns,phy-input-delay-mmc-ddr = <3>;
|