Searched refs:divide (Results 1 – 25 of 28) sorted by relevance
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| /arch/m68k/ifpsp060/ |
| A D | ilsp.doc | 34 module can be used to emulate 64-bit divide and multiply,
95 For a divide:
105 bsr.l _060LISP_TOP+0x08 # branch to divide routine
128 If the instruction being emulated is a divide and the source
130 instruction, executes an implemented divide using a zero
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| A D | fskeleton.S | 145 | This is the exit point for the 060FPSP when an enabled divide-by-zero exception
147 | for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
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| A D | iskeleton.S | 121 | integer divide where the source operand is a zero, then the _isp_unimp()
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| A D | isp.doc | 41 64-bit divide
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| /arch/alpha/lib/ |
| A D | Makefile | 45 $(src)/$(ev6-y)divide.S FORCE
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| /arch/m68k/ifpsp060/src/ |
| A D | ilsp.S | 68 # 64-bit divide instruction. #
85 # sign info for later. Separate out special cases like divide-by-zero #
90 # zero, then perform a divide-by-zero using a 16-bit implemented #
91 # divide instruction. This way, the operating system can record that #
141 # separate signed and unsigned divide
143 beq.b ldspecialcases # use positive divide
174 bls.b ld32bitdivide # yes, so use 32 bit divide
190 # perform the divide algorithm:
191 bsr.l ldclassical # do int divide
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| A D | isp.S | 492 # div64() may take a divide by zero exception.
500 btst &idbyz_bit,SPCOND_FLG(%a6) # did divide-by-zero occur?
510 # (iii) (a7)+; divide-by-zero
512 btst &idbyz_bit,SPCOND_FLG(%a6) # did divide-by-zero occur?
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| /arch/powerpc/lib/ |
| A D | div64.S | 39 divwu r11,r11,r9 # then we divide the shifted quantities
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| /arch/arm64/boot/dts/renesas/ |
| A D | hihope-rev4.dtsi | 61 assigned-clock-rates = <24576000>; /* 1/1 divide */
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| A D | ulcb.dtsi | 226 assigned-clock-rates = <24576000>; /* 1/1 divide */
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| A D | draak.dtsi | 446 assigned-clock-rates = <24576000>; /* 1/1 divide */
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| A D | ebisu.dtsi | 510 assigned-clock-rates = <24576000>; /* 1/1 divide */
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| A D | salvator-common.dtsi | 512 assigned-clock-rates = <24576000>; /* 1/1 divide */
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| /arch/m68k/fpsp040/ |
| A D | satanh.S | 36 | divide-by-zero by
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| A D | fpsp.h | 234 .set dz_bit,2 | divide by zero
241 .set adz_bit,4 | accrued divide by zero
263 .set adz_mask,0x00000010 | accrued divide by zero
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| A D | decbin.S | 473 | else divide fp0/fp1.
485 fdivx %fp1,%fp0 |exp is negative, so divide mant by exp
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| A D | bindec.S | 89 | result is exactly 10^LEN, decrement ILOG and divide
610 | result is exactly 10^LEN, decrement ILOG and divide
681 fdivs FTEN,%fp0 |if equal, divide by 10
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| A D | do_func.S | 169 fbeq t_dz2 |if = -1, divide by zero exception
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| /arch/openrisc/ |
| A D | Kconfig | 123 bool "Have instruction l.div for hardware divide"
126 Select this if your implementation has a hardware divide instruction
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| /arch/powerpc/boot/ |
| A D | div64.S | 39 divwu r11,r11,r9 # then we divide the shifted quantities
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| /arch/arm/mach-pxa/ |
| A D | sleep.S | 62 @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
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| /arch/nios2/kernel/ |
| A D | insnemu.S | 252 divide: label
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| /arch/arc/boot/dts/ |
| A D | hsdk.dts | 159 * unexpected default value (it should divide by 1
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| /arch/arm/mach-omap2/ |
| A D | sram242x.S | 151 moveq r5, r5, lsr #1 @ divide by 2 if to half
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| A D | sram243x.S | 151 moveq r5, r5, lsr #1 @ divide by 2 if to half
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