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Searched refs:errata (Results 1 – 25 of 33) sorted by relevance

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/arch/riscv/
A DKconfig.errata1 menu "CPU errata selection"
4 bool "Andes AX45MP errata"
14 bool "Apply Andes cache management errata"
25 bool "SiFive errata"
35 bool "Apply SiFive errata CIP-453"
46 bool "Apply SiFive errata CIP-1200"
76 bool "T-HEAD errata"
97 bool "Apply T-Head cache management errata"
110 bool "Apply T-Head PMU errata"
123 bool "Apply T-Head Ghostwrite errata"
[all …]
A DKbuild5 obj-y += errata/
/arch/arm/mach-omap2/
A Ddma.c83 unsigned errata = 0; in configure_dma_errata() local
162 return errata; in configure_dma_errata()
190 dma_plat_info.errata = configure_dma_errata(); in omap2_system_dma_init()
/arch/riscv/errata/sifive/
A DMakefile2 obj-y += errata.o
/arch/riscv/errata/andes/
A DMakefile5 obj-y += errata.o
/arch/riscv/errata/thead/
A DMakefile11 obj-y += errata.o
/arch/arm/mach-omap1/
A Ddma.c244 unsigned errata = 0; in configure_dma_errata() local
253 return errata; in configure_dma_errata()
356 p.errata = configure_dma_errata(); in omap1_system_dma_init()
A Domap-dma.c60 static u32 errata; variable
763 errata = p->errata; in omap_system_dma_probe()
A Dsleep.S76 @ work around errata of OMAP1510 PDE bit for TC shut down
/arch/mips/cavium-octeon/executive/
A DMakefile19 obj-y += cvmx-helper-errata.o cvmx-helper-jtag.o cvmx-boot-vector.o
/arch/arm/boot/dts/ti/omap/
A Dam57xx-beagle-x15-revb1.dts33 /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
A Dam57xx-beagle-x15.dts35 /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
A Domap3-ldp.dts208 /* See 35xx errata 2.1.1.128 in SPRZ278F */
A Dam335x-osd3358-sm-red.dts43 * AM335x errata for wiring:
/arch/arm/
A DKconfig347 specific physical addresses or enable errata workarounds that may
540 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
558 bool "ARM errata: Stale prediction on replaced interworking branch"
574 bool "ARM errata: Processor deadlock when a false hazard is created"
605 bool "ARM errata: DMB operation may be faulty"
639 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
704 bool "ARM errata: no automatic Store Buffer drain"
762 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
790 This workaround for all both errata involves setting bit[12] of the
805 bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock"
[all …]
/arch/arm/mm/
A Dcache-l2x0.c685 const char *errata[8]; in l2c310_fixup() local
694 errata[n++] = "588369"; in l2c310_fixup()
701 errata[n++] = "727915"; in l2c310_fixup()
710 errata[n++] = "752271"; in l2c310_fixup()
717 errata[n++] = "753970"; in l2c310_fixup()
721 errata[n++] = "769419"; in l2c310_fixup()
728 pr_cont(" %s", errata[i]); in l2c310_fixup()
A DKconfig1007 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1019 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1027 this errata (fixed in r3p1).
1030 bool "PL310 errata: cache sync operation may be faulty"
1044 bool "PL310 errata: no automatic Store Buffer drain"
A Dcache-v7.S111 teq r1, r2, lsr #4 @ test for errata affected core and if so...
/arch/powerpc/platforms/44x/
A DKconfig304 bool "Enable linker work around for PPC476FPE errata #46"
308 through pages (IBM errata #46). It requires a recent version
316 # 44x errata/workaround config symbols, selected by the CPU models above
/arch/powerpc/platforms/52xx/
A DKconfig53 Enable workarounds for original MPC5200 errata. This is not required
/arch/mips/cavium-octeon/
A DKconfig5 bool "Enable CN63XXP1 errata workarounds"
/arch/m68k/ifpsp060/
A DREADME69 ERRATA Known errata for this release
/arch/arm64/boot/dts/freescale/
A Dimx8mm-kontron-bl-osm-s.dts80 * with corrupted data due to chip errata.
/arch/arm/boot/dts/nxp/imx/
A Dimx6qdl-dhcom-som.dtsi210 * [1] https://www.nxp.com/docs/en/errata/IMX6SDLCE.pdf
211 * [2] https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
/arch/arm/mach-versatile/
A DKconfig270 bool "Enable A5 and A9 only errata work-arounds"

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