Home
last modified time | relevance | path

Searched refs:ext (Results 1 – 25 of 407) sorted by relevance

12345678910>>...17

/arch/riscv/include/asm/
A Dcpufeature-macros.h15 #define riscv_isa_extension_available(isa_bitmap, ext) \ argument
16 __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
19 const unsigned long ext) in __riscv_has_extension_likely() argument
21 asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1) in __riscv_has_extension_likely()
23 : [vendor] "i" (vendor), [ext] "i" (ext) in __riscv_has_extension_likely()
33 const unsigned long ext) in __riscv_has_extension_unlikely() argument
37 : [vendor] "i" (vendor), [ext] "i" (ext) in __riscv_has_extension_unlikely()
51 return __riscv_has_extension_unlikely(STANDARD_EXT, ext); in riscv_has_extension_unlikely()
53 return __riscv_isa_extension_available(NULL, ext); in riscv_has_extension_unlikely()
61 return __riscv_has_extension_likely(STANDARD_EXT, ext); in riscv_has_extension_likely()
[all …]
A Dvendor_extensions.h45 #define riscv_cpu_isa_vendor_extension_available(cpu, vendor, ext) \ argument
47 #define riscv_isa_vendor_extension_available(vendor, ext) \ argument
49 RISCV_ISA_VENDOR_EXT_##ext)
52 const unsigned long ext) in riscv_has_vendor_extension_likely() argument
59 ext + RISCV_VENDOR_EXT_ALTERNATIVES_BASE); in riscv_has_vendor_extension_likely()
65 const unsigned long ext) in riscv_has_vendor_extension_unlikely() argument
72 ext + RISCV_VENDOR_EXT_ALTERNATIVES_BASE); in riscv_has_vendor_extension_unlikely()
78 int cpu, const unsigned long ext) in riscv_cpu_has_vendor_extension_likely() argument
87 return __riscv_isa_vendor_extension_available(cpu, vendor, ext); in riscv_cpu_has_vendor_extension_likely()
92 const unsigned long ext) in riscv_cpu_has_vendor_extension_unlikely() argument
[all …]
A Dtrace.h11 TP_PROTO(int ext, int fid),
12 TP_ARGS(ext, fid),
13 TP_CONDITION(ext != SBI_EXT_HSM),
16 __field(int, ext)
21 __entry->ext = ext;
25 TP_printk("ext=0x%x fid=%d", __entry->ext, __entry->fid)
29 TP_PROTO(int ext, long error, long value),
30 TP_ARGS(ext, error, value),
31 TP_CONDITION(ext != SBI_EXT_HSM),
A Dcpufeature.h131 static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext) in riscv_cpu_has_extension_likely() argument
133 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); in riscv_cpu_has_extension_likely()
136 __riscv_has_extension_likely(STANDARD_EXT, ext)) in riscv_cpu_has_extension_likely()
139 return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); in riscv_cpu_has_extension_likely()
142 static __always_inline bool riscv_cpu_has_extension_unlikely(int cpu, const unsigned long ext) in riscv_cpu_has_extension_unlikely() argument
144 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); in riscv_cpu_has_extension_unlikely()
147 __riscv_has_extension_unlikely(STANDARD_EXT, ext)) in riscv_cpu_has_extension_unlikely()
150 return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); in riscv_cpu_has_extension_unlikely()
/arch/riscv/include/asm/vendor_extensions/
A Dvendor_hwprobe.h11 #define VENDOR_EXT_KEY(ext) \ argument
13 if (__riscv_isa_extension_available(isainfo->isa, RISCV_ISA_VENDOR_EXT_##ext)) \
14 pair->value |= RISCV_HWPROBE_VENDOR_EXT_##ext; \
16 missing |= RISCV_HWPROBE_VENDOR_EXT_##ext; \
/arch/riscv/kernel/
A Dcpufeature.c550 set_bit(ext->id, bitmap); in riscv_isa_set_ext()
595 if (ext && ext->validate) { in riscv_resolve_isa()
596 ret = ext->validate(ext, resolved_isa); in riscv_resolve_isa()
625 riscv_isa_set_ext(ext, bitmap); in match_isa_ext()
642 const char *ext = isa++; in riscv_parse_isa_string() local
646 switch (*ext) { in riscv_parse_isa_string()
670 if (ext[-1] != '_' && ext[1] == 'u') { in riscv_parse_isa_string()
740 if (unlikely(!isalpha(*ext))) { in riscv_parse_isa_string()
889 ext.property) < 0) in riscv_fill_cpu_vendor_ext()
896 if (ext.subset_ext_size) in riscv_fill_cpu_vendor_ext()
[all …]
A Dsbi_ecall.c23 int fid, int ext) in __sbi_ecall() argument
27 trace_sbi_call(ext, fid); in __sbi_ecall()
36 register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); in __sbi_ecall()
44 trace_sbi_return(ext, ret.error, ret.value); in __sbi_ecall()
A Dsbi.c210 int ext = SBI_EXT_RFENCE; in __sbi_rfence_v02_call() local
215 ret = sbi_ecall(ext, fid, hmask, hbase, 0, 0, 0, 0); in __sbi_rfence_v02_call()
218 ret = sbi_ecall(ext, fid, hmask, hbase, start, in __sbi_rfence_v02_call()
222 ret = sbi_ecall(ext, fid, hmask, hbase, start, in __sbi_rfence_v02_call()
227 ret = sbi_ecall(ext, fid, hmask, hbase, start, in __sbi_rfence_v02_call()
231 ret = sbi_ecall(ext, fid, hmask, hbase, start, in __sbi_rfence_v02_call()
235 ret = sbi_ecall(ext, fid, hmask, hbase, start, in __sbi_rfence_v02_call()
239 ret = sbi_ecall(ext, fid, hmask, hbase, start, in __sbi_rfence_v02_call()
244 fid, ext); in __sbi_rfence_v02_call()
/arch/x86/tools/
A Dgen-insn-attr-x86.awk296 ext = null
306 ext = $(i++)
321 if (match(ext, force64_expr))
330 if (match(ext, no_rex2_expr))
342 if (match(ext, evexonly_expr))
352 if (match(ext, prefix_expr)) {
360 if (match(ext, lprefix1_expr)) {
364 if (match(ext, lprefix2_expr)) {
368 if (match(ext, lprefix3_expr)) {
372 if (match(ext, rex2_expr))
[all …]
/arch/arm/mm/
A Dproc.c43 void cpu_arm720_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
90 void cpu_arm920_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
113 void cpu_arm922_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
130 void cpu_arm925_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
147 void cpu_arm926_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
200 void cpu_fa526_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
285 void cpu_sa110_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
348 void cpu_xsc3_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
417 void cpu_v6_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
452 void cpu_v7_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
[all …]
/arch/mips/boot/dts/mobileye/
A Deyeq5-pins.dtsi29 timer5_ext_pins: timer5-ext-pins {
33 timer5_ext_input_pins: timer5-ext-input-pins {
37 timer5_ext_incap_a_pins: timer5-ext-incap-a-pin {
41 timer5_ext_incap_b_pins: timer5-ext-incap-b-pin {
85 timer6_ext_pins: timer6-ext-pins {
89 timer6_ext_input_pins: timer6-ext-input-pins {
93 timer6_ext_incap_a_pins: timer6-ext-incap-a-pin {
97 timer6_ext_incap_b_pins: timer6-ext-incap-b-pin {
/arch/riscv/kvm/
A Dvcpu_sbi.c436 ext = entry->ext_ptr; in kvm_vcpu_sbi_find_ext()
438 if (ext->extid_start <= extid && ext->extid_end >= extid) { in kvm_vcpu_sbi_find_ext()
442 return ext; in kvm_vcpu_sbi_find_ext()
525 ext = entry->ext_ptr; in kvm_riscv_vcpu_sbi_init()
531 if (ext->probe && !ext->probe(vcpu)) { in kvm_riscv_vcpu_sbi_init()
540 if (ext->init && ext->init(vcpu) != 0) in kvm_riscv_vcpu_sbi_init()
554 ext = entry->ext_ptr; in kvm_riscv_vcpu_sbi_deinit()
561 !ext->deinit) in kvm_riscv_vcpu_sbi_deinit()
564 ext->deinit(vcpu); in kvm_riscv_vcpu_sbi_deinit()
584 !ext->reset) in kvm_riscv_vcpu_sbi_reset()
[all …]
/arch/mips/boot/dts/xilfpga/
A DmicroAptiv.dtsi13 clocks = <&ext>;
18 ext: ext { label
/arch/arm64/boot/dts/sprd/
A Dsharkl3.dtsi46 clock-names = "ext-26m";
78 clock-names = "ext-26m";
110 clock-names = "ext-26m";
157 clock-names = "ext-26m";
215 ext_26m: ext-26m {
219 clock-output-names = "ext-26m";
222 ext_32k: ext-32k {
226 clock-output-names = "ext-32k";
229 ext_4m: ext-4m {
233 clock-output-names = "ext-4m";
/arch/arm64/crypto/
A Dsm4-ce-gcm-core.S40 ext T0.16b, m1.16b, m1.16b, #8; \
46 ext T1.16b, RZERO.16b, T0.16b, #8; \
47 ext T0.16b, T0.16b, RZERO.16b, #8; \
55 ext T0.16b, m1.16b, m1.16b, #8; \
56 ext T2.16b, m3.16b, m3.16b, #8; \
57 ext T4.16b, m5.16b, m5.16b, #8; \
58 ext T6.16b, m7.16b, m7.16b, #8; \
111 ext T0.16b, m1.16b, m1.16b, #8; \
130 ext b0.16b, b0.16b, b0.16b, #8; \
501 ext v0.16b, v0.16b, v0.16b, #1
[all …]
A Dsm3-ce-core.S54 ext \s4\().16b, \s1\().16b, \s2\().16b, #12
55 ext v6.16b, \s0\().16b, \s1\().16b, #12
56 ext v7.16b, \s2\().16b, \s3\().16b, #8
82 ext v8.16b, v8.16b, v8.16b, #8
83 ext v9.16b, v9.16b, v9.16b, #8
100 ext v11.16b, v13.16b, v13.16b, #4
107 ext v11.16b, v14.16b, v14.16b, #4
131 ext v8.16b, v8.16b, v8.16b, #8
132 ext v9.16b, v9.16b, v9.16b, #8
A Dpolyval-ce-core.S96 ext v25.16b, X.16b, X.16b, #8
97 ext v26.16b, Y.16b, Y.16b, #8
117 ext v25.16b, X.16b, X.16b, #8
118 ext v26.16b, Y.16b, Y.16b, #8
140 ext v5.16b, LO.16b, HI.16b, #8
144 ext HI.16b, HI.16b, HI.16b, #8
146 ext LO.16b, LO.16b, LO.16b, #8
148 ext PH.16b, v4.16b, HI.16b, #8
150 ext PL.16b, LO.16b, v4.16b, #8
197 ext TMP_V.16b, TMP_V.16b, TMP_V.16b, #8
[all …]
A Dghash-ce-core.S136 ext t3.16b, t3.16b, t3.16b, #15
137 ext t5.16b, t5.16b, t5.16b, #14
138 ext t7.16b, t7.16b, t7.16b, #13
139 ext t9.16b, t9.16b, t9.16b, #12
208 ext T2.16b, XL.16b, XL.16b, #8
227 ext T1.16b, XL.16b, XH.16b, #8
278 ext IN1.16b, T2.16b, T2.16b, #8
307 ext T1.16b, XL.16b, XH.16b, #8
325 ext T2.16b, XL.16b, XL.16b, #8
336 ext T1.16b, XL.16b, XH.16b, #8
[all …]
A Dsm4-ce-asm.h21 ext b0.16b, b0.16b, b0.16b, #8; \
47 ext b0.16b, b0.16b, b0.16b, #8; \
48 ext b1.16b, b1.16b, b1.16b, #8; \
94 ext b0.16b, b0.16b, b0.16b, #8; \
95 ext b1.16b, b1.16b, b1.16b, #8; \
96 ext b2.16b, b2.16b, b2.16b, #8; \
97 ext b3.16b, b3.16b, b3.16b, #8; \
183 ext b0.16b, b0.16b, b0.16b, #8; \
184 ext b1.16b, b1.16b, b1.16b, #8; \
185 ext b2.16b, b2.16b, b2.16b, #8; \
[all …]
/arch/x86/kvm/vmx/
A Dvmx_ops.h17 void invvpid_error(unsigned long ext, u16 vpid, gva_t gva);
18 void invept_error(unsigned long ext, u64 eptp);
306 static inline void __invvpid(unsigned long ext, u16 vpid, gva_t gva) in __invvpid() argument
314 vmx_asm2(invvpid, "r"(ext), "m"(operand), ext, vpid, gva); in __invvpid()
317 static inline void __invept(unsigned long ext, u64 eptp) in __invept() argument
323 vmx_asm2(invept, "r"(ext), "m"(operand), ext, eptp); in __invept()
/arch/arm64/kernel/vdso/
A Dvgetrandom-chacha.S99 ext state1.16b, state1.16b, state1.16b, #4
101 ext state2.16b, state2.16b, state2.16b, #8
103 ext state3.16b, state3.16b, state3.16b, #12
129 ext state1.16b, state1.16b, state1.16b, #12
131 ext state2.16b, state2.16b, state2.16b, #8
133 ext state3.16b, state3.16b, state3.16b, #4
/arch/mips/boot/dts/ingenic/
A Djz4740.dtsi42 ext: ext { label
57 clocks = <&ext>, <&rtc>;
58 clock-names = "ext", "rtc";
76 clock-names = "rtc", "ext", "pclk", "tcu";
237 clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
248 clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
A Djz4770.dtsi42 ext: ext { label
60 clocks = <&ext>, <&osc32k>;
61 clock-names = "ext", "osc32k";
87 clock-names = "rtc", "ext", "pclk";
325 clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
338 clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
351 clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
364 clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
A Djz4780.dtsi52 ext: ext { label
72 clocks = <&ext>, <&rtc>;
73 clock-names = "ext", "rtc";
108 clock-names = "rtc", "ext", "pclk";
286 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
299 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
312 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
325 clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
338 clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
/arch/x86/events/
A Dutils.c10 int ext; in decode_branch_type() local
55 ext = (insn->modrm.bytes[0] >> 3) & 0x7; in decode_branch_type()
56 switch (ext) { in decode_branch_type()

Completed in 44 milliseconds

12345678910>>...17