Home
last modified time | relevance | path

Searched refs:extensions (Results 1 – 25 of 32) sorted by relevance

12

/arch/riscv/
A DKconfig.vendor1 menu "Vendor extensions"
13 support. This will cause any Andes vendor extensions that are
26 support. This will cause any SiFive vendor extensions that are
39 extensions. Without this option enabled, T-Head vendor extensions will
A DKconfig537 without one of those extensions.
735 # extensions, including Zvk*, Zvbb, and Zvbc. LLVM added all of these at once.
873 the Zicsr and Zifencei extensions. This requires explicitly specifying
1317 Documentation/devicetree/bindings/riscv/extensions.yaml for details
1319 "riscv,isa-extensions".
/arch/riscv/boot/dts/sophgo/
A Dsg2042-cpus.dtsi261 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
288 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
315 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
342 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
369 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
396 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
423 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
450 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
477 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
504 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
[all …]
A Dsg2044-cpus.dtsi29 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
65 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
101 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
137 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
173 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
209 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
245 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
281 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
317 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
353 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
[all …]
A Dcv180x-cpus.dtsi26 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
/arch/arm64/crypto/
A DKconfig26 - NEON (Advanced SIMD) extensions
48 - NEON (Advanced SIMD) extensions
126 - NEON (Advanced SIMD) extensions
146 - NEON (Advanced SIMD) extensions
158 - NEON (Advanced SIMD) extensions
176 - NEON (Advanced SIMD) extensions
191 - NEON (Advanced SIMD) extensions
208 - NEON (Advanced SIMD) extensions
224 - NEON (Advanced SIMD) extensions
240 - NEON (Advanced SIMD) extensions
/arch/loongarch/kvm/
A DKconfig39 hardware virtualization extensions. You will need
40 a processor equipped with virtualization extensions.
/arch/riscv/boot/dts/andes/
A Dqilai.dtsi24 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
49 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
75 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
101 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
/arch/arm/crypto/
A DKconfig16 - NEON (Advanced SIMD) extensions
31 - NEON (Advanced SIMD) extensions
47 - NEON (Advanced SIMD) extensions
57 - NEON (Advanced SIMD) extensions
/arch/arm/include/asm/
A Ddma-iommu.h17 unsigned int extensions; member
/arch/riscv/boot/dts/sifive/
A Dfu540-c000.dtsi34 riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei",
60 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
87 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
114 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
141 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
A Dfu740-c000.dtsi35 riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei",
62 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
89 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
116 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
143 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
/arch/riscv/boot/dts/spacemit/
A Dk1.dtsi58 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
88 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
118 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
148 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
178 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
208 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
238 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
268 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
/arch/x86/kvm/
A DKconfig57 virtualization extensions. You will need a fairly recent
58 processor equipped with virtualization extensions. You will also
102 extensions, a.k.a. Virtual Machine Extensions (VMX).
149 (SVM) extensions.
/arch/riscv/boot/dts/microchip/
A Dmpfs.dtsi27 riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei",
56 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
87 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
118 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
149 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
/arch/x86/boot/
A Dpmjump.S63 # Clear registers to allow for future extensions to the
/arch/powerpc/crypto/
A DKconfig35 - SPE (Signal Processing Engine) extensions
/arch/arm/mm/
A Ddma-mapping.c827 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions); in __free_iova()
1552 int extensions = 1; in arm_iommu_create_mapping() local
1563 extensions = bitmap_size / PAGE_SIZE; in arm_iommu_create_mapping()
1572 mapping->bitmaps = kcalloc(extensions, sizeof(unsigned long *), in arm_iommu_create_mapping()
1582 mapping->extensions = extensions; in arm_iommu_create_mapping()
1624 if (mapping->nr_bitmaps >= mapping->extensions) in extend_iommu_mapping()
/arch/riscv/boot/dts/allwinner/
A Dsun20i-d1s.dtsi29 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
/arch/riscv/boot/dts/renesas/
A Dr9a07g043f.dtsi28 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
/arch/riscv/boot/dts/thead/
A Dth1520.dtsi27 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
51 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
75 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
99 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
/arch/riscv/boot/dts/starfive/
A Djh7100.dtsi38 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
67 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
A Djh7110.dtsi32 riscv,isa-extensions = "i", "m", "a", "c", "zba", "zbb", "zicntr", "zicsr",
61 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
94 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
127 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
160 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
/arch/powerpc/platforms/
A DKconfig.cputype365 This option enables kernel support for the Altivec extensions to the
382 This option enables kernel support for the Vector Scaler extensions
/arch/arm/mach-versatile/
A DKconfig204 # ARMv6 CPU without K extensions, but does have the new exclusive ops

Completed in 780 milliseconds

12