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Searched refs:field (Results 1 – 25 of 101) sorted by relevance

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/arch/x86/kvm/vmx/
A Dvmx_ops.h57 BUILD_BUG_ON_MSG(__builtin_constant_p(field) && ((field) & 0x6000) == 0, in vmcs_check32()
69 BUILD_BUG_ON_MSG(__builtin_constant_p(field) && ((field) & 0x6000) == 0, in vmcs_check64()
81 BUILD_BUG_ON_MSG(__builtin_constant_p(field) && ((field) & 0x6000) == 0, in vmcs_checkl()
103 : [field] "r" (field) in __vmcs_readl()
148 : [field] "r" (field) in __vmcs_readl()
179 return __vmcs_readl(field) | ((u64)__vmcs_readl(field+1) << 32); in vmcs_read64()
227 vmx_asm2(vmwrite, "r"(field), "rm"(value), field, value); in __vmcs_writel()
274 return evmcs_write32(field, evmcs_read32(field) & ~mask); in vmcs_clear_bits()
276 __vmcs_writel(field, __vmcs_readl(field) & ~mask); in vmcs_clear_bits()
284 return evmcs_write32(field, evmcs_read32(field) | mask); in vmcs_set_bits()
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A Dtdx.h97 #define VMCS_ENC_ACCESS_TYPE(field) ((field) & VMCS_ENC_ACCESS_TYPE_MASK) in tdvps_vmcs_check() argument
100 BUILD_BUG_ON_MSG(__builtin_constant_p(field) && in tdvps_vmcs_check()
111 #define VMCS_ENC_WIDTH(field) ((field) & VMCS_ENC_WIDTH_MASK) in tdvps_vmcs_check() argument
131 u32 field) \
135 tdvps_##lclass##_check(field, bits); \
144 u32 field, u##bits val) \
148 tdvps_##lclass##_check(field, bits); \
155 u32 field, u64 bit) \
159 tdvps_##lclass##_check(field, bits); \
165 u32 field, u64 bit) \
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A Dvmx_onhyperv.h26 static __always_inline int get_evmcs_offset(unsigned long field, in get_evmcs_offset() argument
29 int offset = evmcs_field_offset(field, clean_field); in get_evmcs_offset()
38 int offset = get_evmcs_offset(field, &clean_field); in evmcs_write64()
51 int offset = get_evmcs_offset(field, &clean_field); in evmcs_write32()
63 int offset = get_evmcs_offset(field, &clean_field); in evmcs_write16()
72 static __always_inline u64 evmcs_read64(unsigned long field) in evmcs_read64() argument
74 int offset = get_evmcs_offset(field, NULL); in evmcs_read64()
82 static __always_inline u32 evmcs_read32(unsigned long field) in evmcs_read32() argument
84 int offset = get_evmcs_offset(field, NULL); in evmcs_read32()
92 static __always_inline u16 evmcs_read16(unsigned long field) in evmcs_read16() argument
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A Dtdx_arch.h14 #define __BUILD_TDX_FIELD(non_arch, class, field) \ argument
17 ((u64)(field) & TDX_FIELD_MASK))
19 #define BUILD_TDX_FIELD(class, field) \ argument
20 __BUILD_TDX_FIELD(false, (class), (field))
22 #define BUILD_TDX_FIELD_NON_ARCH(class, field) \ argument
23 __BUILD_TDX_FIELD(true, (class), (field))
52 #define TDCS_EXEC(field) BUILD_TDX_FIELD(TD_CLASS_EXECUTION_CONTROLS, (field)) argument
55 #define TDVPS_VMCS(field) BUILD_TDX_FIELD(TDVPS_CLASS_VMCS, (field)) argument
58 #define TDVPS_STATE(field) BUILD_TDX_FIELD(TDVPS_CLASS_OTHER_GUEST, (field)) argument
59 #define TDVPS_STATE_NON_ARCH(field) BUILD_TDX_FIELD_NON_ARCH(TDVPS_CLASS_OTHER_GUEST, (field)) argument
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A Dvmx_onhyperv.c15 #define evmcs_check_vmcs_conf(field, ctrl) \ argument
17 typeof(vmcs_conf->field) unsupported; \
19 unsupported = vmcs_conf->field & ~EVMCS1_SUPPORTED_ ## ctrl; \
21 pr_warn_once(#field " unsupported with eVMCS: 0x%llx\n",\
23 vmcs_conf->field &= EVMCS1_SUPPORTED_ ## ctrl; \
A Dvmcs.h178 static inline int vmcs_field_width(unsigned long field) in vmcs_field_width() argument
180 if (0x1 & field) /* the *_HIGH fields are all 32 bit */ in vmcs_field_width()
182 return (field >> 13) & 0x3; in vmcs_field_width()
185 static inline int vmcs_field_readonly(unsigned long field) in vmcs_field_readonly() argument
187 return (((field >> 10) & 0x3) == 1); in vmcs_field_readonly()
193 static inline unsigned int vmcs_field_index(unsigned long field) in vmcs_field_index() argument
195 return (field & VMCS_FIELD_INDEX_MASK) >> VMCS_FIELD_INDEX_SHIFT; in vmcs_field_index()
A Dhyperv_evmcs.h129 static __always_inline int evmcs_field_offset(unsigned long field, in evmcs_field_offset() argument
133 unsigned int index = ROL16(field, 6); in evmcs_field_offset()
155 unsigned long field, u16 offset) in evmcs_read_any() argument
163 return vmcs12_read_any((void *)evmcs, field, offset); in evmcs_read_any()
A Dvmcs12.h213 #define CHECK_OFFSET(field, loc) \ argument
214 ASSERT_STRUCT_OFFSET(struct vmcs12, field, loc)
368 static inline short get_vmcs12_field_offset(unsigned long field) in get_vmcs12_field_offset() argument
373 if (field >> 15) in get_vmcs12_field_offset()
376 index = ROL16(field, 6); in get_vmcs12_field_offset()
387 static inline u64 vmcs12_read_any(struct vmcs12 *vmcs12, unsigned long field, in vmcs12_read_any() argument
392 switch (vmcs_field_width(field)) { in vmcs12_read_any()
407 static inline void vmcs12_write_any(struct vmcs12 *vmcs12, unsigned long field, in vmcs12_write_any() argument
412 switch (vmcs_field_width(field)) { in vmcs12_write_any()
/arch/arm64/tools/
A Dgen-sysreg.awk232 field = "RES0_" msb "_" lsb
242 field = "RES1_" msb "_" lsb
252 field = "UNKN_" msb "_" lsb
261 field = $3
262 parse_bitdef(reg, field, $2)
272 parse_bitdef(reg, field, $2)
281 field = $3
282 parse_bitdef(reg, field, $2)
294 field = $3
307 field = $3
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/arch/mips/mm/
A Dfault.c55 field, regs->cp0_epc); in __do_page_fault()
123 field, address, write, in __do_page_fault()
124 field, regs->cp0_epc); in __do_page_fault()
134 field, address, write, in __do_page_fault()
135 field, regs->cp0_epc); in __do_page_fault()
205 field, address); in __do_page_fault()
206 pr_info("epc = %0*lx in", field, in __do_page_fault()
210 pr_info("ra = %0*lx in", field, in __do_page_fault()
235 raw_smp_processor_id(), field, address, field, regs->cp0_epc, in __do_page_fault()
236 field, regs->regs[31]); in __do_page_fault()
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/arch/riscv/include/asm/
A Dimage.h21 #define __HEAD_FLAG(field) (__HEAD_FLAG_##field << \ argument
22 RISCV_IMAGE_FLAG_##field##_SHIFT)
33 #define riscv_image_flag_field(flags, field)\ argument
34 (((flags) >> field##_SHIFT) & field##_MASK)
/arch/x86/tools/
A Dobjdump_reformat.awk25 if (split($0, field, /: |\t/) < 3) {
27 prev_hex = prev_hex field[2]
39 prev_addr = field[1]
40 prev_hex = field[2]
41 prev_mnemonic = field[3]
A Dinsn_decoder_test.c59 struct insn_field *field) in dump_field() argument
63 indent, field->value, field->bytes[0], field->bytes[1], in dump_field()
64 field->bytes[2], field->bytes[3]); in dump_field()
66 field->got, field->nbytes); in dump_field()
A Dinsn_sanity.c53 struct insn_field *field) in dump_field() argument
57 indent, field->value, field->bytes[0], field->bytes[1], in dump_field()
58 field->bytes[2], field->bytes[3]); in dump_field()
60 field->got, field->nbytes); in dump_field()
/arch/mips/include/uapi/asm/
A Dbitfield.h16 #define __BITFIELD_FIELD(field, more) \ argument
17 field; \
22 #define __BITFIELD_FIELD(field, more) \ argument
24 field;
/arch/loongarch/mm/
A Dfault.c75 const int field = sizeof(unsigned long) * 2; in no_context() local
95 raw_smp_processor_id(), field, address, field, regs->csr_era, in no_context()
96 field, regs->regs[1]); in no_context()
135 const int field = sizeof(unsigned long) * 2; in do_sigsegv() local
157 field, address); in do_sigsegv()
158 pr_info("era = %0*lx in", field, in do_sigsegv()
162 pr_info("ra = %0*lx in", field, in do_sigsegv()
/arch/mips/lib/
A Ddump_tlb.c19 const int field = 2 * sizeof(unsigned long); in dump_tlb_regs() local
25 pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi()); in dump_tlb_regs()
26 pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0()); in dump_tlb_regs()
27 pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1()); in dump_tlb_regs()
40 pr_info("PWField : %0*lx\n", field, read_c0_pwfield()); in dump_tlb_regs()
41 pr_info("PWSize : %0*lx\n", field, read_c0_pwsize()); in dump_tlb_regs()
/arch/arm64/include/asm/
A Dimage.h25 #define arm64_image_flag_field(flags, field) \ argument
26 (((flags) >> field##_SHIFT) & field##_MASK)
A Dcpufeature.h528 cpuid_feature_extract_signed_field_width(u64 features, int field, int width) in cpuid_feature_extract_signed_field_width() argument
530 return (s64)(features << (64 - width - field)) >> (64 - width); in cpuid_feature_extract_signed_field_width()
534 cpuid_feature_extract_signed_field(u64 features, int field) in cpuid_feature_extract_signed_field() argument
536 return cpuid_feature_extract_signed_field_width(features, field, 4); in cpuid_feature_extract_signed_field()
542 return (u64)(features << (64 - width - field)) >> (64 - width); in cpuid_feature_extract_unsigned_field_width()
546 cpuid_feature_extract_unsigned_field(u64 features, int field) in cpuid_feature_extract_unsigned_field() argument
548 return cpuid_feature_extract_unsigned_field_width(features, field, 4); in cpuid_feature_extract_unsigned_field()
567 cpuid_feature_extract_signed_field_width(features, field, width) : in cpuid_feature_extract_field_width()
568 cpuid_feature_extract_unsigned_field_width(features, field, width); in cpuid_feature_extract_field_width()
572 cpuid_feature_extract_field(u64 features, int field, bool sign) in cpuid_feature_extract_field() argument
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/arch/mips/cavium-octeon/executive/
A Dcvmx-l2c.c51 uint32_t field; in cvmx_l2c_get_core_way_partition() local
64 field = (core & 0x3) * 8; in cvmx_l2c_get_core_way_partition()
73 return (cvmx_read_csr(CVMX_L2C_SPAR0) & (0xFF << field)) >> field; in cvmx_l2c_get_core_way_partition()
75 return (cvmx_read_csr(CVMX_L2C_SPAR1) & (0xFF << field)) >> field; in cvmx_l2c_get_core_way_partition()
77 return (cvmx_read_csr(CVMX_L2C_SPAR2) & (0xFF << field)) >> field; in cvmx_l2c_get_core_way_partition()
79 return (cvmx_read_csr(CVMX_L2C_SPAR3) & (0xFF << field)) >> field; in cvmx_l2c_get_core_way_partition()
86 uint32_t field; in cvmx_l2c_set_core_way_partition() local
121 mask << field); in cvmx_l2c_set_core_way_partition()
126 mask << field); in cvmx_l2c_set_core_way_partition()
131 mask << field); in cvmx_l2c_set_core_way_partition()
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/arch/arm64/kernel/
A Dimage.h41 #define __HEAD_FLAG(field) (__HEAD_FLAG_##field << \ argument
42 ARM64_IMAGE_FLAG_##field##_SHIFT)
/arch/loongarch/lib/
A Ddump_tlb.c19 const int field = 2 * sizeof(unsigned long); in dump_tlb_regs() local
23 pr_info("EntryHi : 0x%0*lx\n", field, read_csr_entryhi()); in dump_tlb_regs()
24 pr_info("EntryLo0 : 0x%0*lx\n", field, read_csr_entrylo0()); in dump_tlb_regs()
25 pr_info("EntryLo1 : 0x%0*lx\n", field, read_csr_entrylo1()); in dump_tlb_regs()
/arch/arm/boot/dts/xen/
A Dxenvm-4.2.dts20 /* this field is going to be adjusted by the hypervisor */
50 /* this field is going to be adjusted by the hypervisor */
73 /* this field is going to be adjusted by the hypervisor */
75 /* this field is going to be adjusted by the hypervisor */
/arch/sh/drivers/dma/
A Ddma-sysfs.c115 #define dma_ro_attr(field, fmt) \ argument
116 static ssize_t dma_show_##field(struct device *dev, \
120 return sprintf(buf, fmt, channel->field); \
122 static DEVICE_ATTR(field, S_IRUGO, dma_show_##field, NULL);
/arch/x86/include/asm/
A Dsvm.h653 #define GHCB_BITMAP_IDX(field) \ argument
654 (offsetof(struct ghcb_save_area, field) / sizeof(u64))
656 #define DEFINE_GHCB_ACCESSORS(field) \ argument
659 return test_bit(GHCB_BITMAP_IDX(field), \
663 static __always_inline u64 ghcb_get_##field(struct ghcb *ghcb) \
665 return ghcb->save.field; \
668 static __always_inline u64 ghcb_get_##field##_if_valid(struct ghcb *ghcb) \
670 return ghcb_##field##_is_valid(ghcb) ? ghcb->save.field : 0; \
673 static __always_inline void ghcb_set_##field(struct ghcb *ghcb, u64 value) \
675 __set_bit(GHCB_BITMAP_IDX(field), \
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