| /arch/xtensa/include/asm/ |
| A D | cacheflush.h | 100 void flush_icache_range(unsigned long start, unsigned long end);
105 #define flush_icache_range flush_icache_range macro
110 #define flush_icache_range local_flush_icache_range macro
143 #define flush_icache_range local_flush_icache_range macro
147 #define flush_icache_user_range flush_icache_range
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| /arch/arm64/include/asm/ |
| A D | cacheflush.h | 82 static inline void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function
105 #define flush_icache_range flush_icache_range macro
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| /arch/hexagon/include/asm/ |
| A D | cacheflush.h | 37 extern void flush_icache_range(unsigned long start, unsigned long end);
38 #define flush_icache_range flush_icache_range macro
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| /arch/arc/kernel/ |
| A D | kprobes.c | 41 flush_icache_range((unsigned long)p->addr, in arch_arm_kprobe()
49 flush_icache_range((unsigned long)p->addr, in arch_disarm_kprobe()
61 flush_icache_range((unsigned long)p->ainsn.t1_addr, in arch_remove_kprobe()
71 flush_icache_range((unsigned long)p->ainsn.t2_addr, in arch_remove_kprobe()
105 flush_icache_range((unsigned long)p->ainsn.t1_addr, in resume_execution()
115 flush_icache_range((unsigned long)p->ainsn.t2_addr, in resume_execution()
138 flush_icache_range((unsigned long)p->addr, in setup_singlestep()
178 flush_icache_range((unsigned long)p->ainsn.t1_addr, in setup_singlestep()
187 flush_icache_range((unsigned long)p->ainsn.t2_addr, in setup_singlestep()
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| /arch/riscv/include/asm/ |
| A D | cacheflush.h | 80 #define flush_icache_range flush_icache_range macro
81 static inline void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function
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| /arch/powerpc/include/asm/ |
| A D | cacheflush.h | 53 void flush_icache_range(unsigned long start, unsigned long stop);
54 #define flush_icache_range flush_icache_range macro
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| /arch/hexagon/mm/ |
| A D | cache.c | 35 void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function
58 EXPORT_SYMBOL(flush_icache_range);
123 flush_icache_range((unsigned long) dst, in copy_to_user_page()
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| /arch/alpha/include/asm/ |
| A D | cacheflush.h | 20 #define flush_icache_range(start, end) imb() macro
22 #define flush_icache_range(start, end) smp_imb() macro
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| /arch/powerpc/mm/ |
| A D | cacheflush.c | 58 void flush_icache_range(unsigned long start, unsigned long stop) in flush_icache_range() function
77 EXPORT_SYMBOL(flush_icache_range);
219 flush_icache_range((unsigned long)maddr, (unsigned long)maddr + len); in flush_icache_user_page()
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| /arch/m68k/mm/ |
| A D | cache.c | 91 void flush_icache_range(unsigned long address, unsigned long endaddr) in flush_icache_range() function
97 EXPORT_SYMBOL(flush_icache_range);
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| /arch/arm/kernel/ |
| A D | fiq.c | 102 flush_icache_range((unsigned long)base + offset, in set_fiq_handler()
104 flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length); in set_fiq_handler()
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| /arch/mips/kernel/ |
| A D | ftrace.c | 83 flush_icache_range(ip, ip + 8); in ftrace_modify_code()
104 flush_icache_range(ip, ip + 8); in ftrace_modify_code_2()
124 flush_icache_range(ip, ip + 8); in ftrace_modify_code_2r()
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| /arch/sh/include/asm/ |
| A D | cacheflush.h | 52 extern void flush_icache_range(unsigned long start, unsigned long end);
53 #define flush_icache_user_range flush_icache_range
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| /arch/microblaze/kernel/ |
| A D | ftrace.c | 57 flush_icache_range((u32)parent, (u32)parent + 4); in prepare_ftrace_return()
94 flush_icache_range(addr, addr + 4); in ftrace_modify_code()
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| /arch/mips/loongson2ef/common/ |
| A D | init.c | 25 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); in mips_nmi_setup()
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| /arch/arm/include/asm/ |
| A D | fncpy.h | 73 flush_icache_range((unsigned long)(dest_buf), \
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| /arch/nios2/kernel/ |
| A D | nios2_ksyms.c | 24 EXPORT_SYMBOL(flush_icache_range);
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| /arch/m68k/include/asm/ |
| A D | cacheflush_no.h | 13 #define flush_icache_range(start, len) __flush_icache_all() macro
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| /arch/parisc/include/asm/ |
| A D | kprobes.h | 32 flush_icache_range((unsigned long)&(p)->ainsn.insn[0], \
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| /arch/mips/include/asm/ |
| A D | kprobes.h | 35 flush_icache_range((unsigned long)p->addr, \
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| /arch/loongarch/include/asm/ |
| A D | kprobes.h | 18 flush_icache_range((unsigned long)p->addr, \
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| /arch/csky/kernel/ |
| A D | jump_label.c | 40 flush_icache_range(addr, addr + 4); in arch_jump_label_transform()
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| /arch/powerpc/kernel/ |
| A D | kvm.c | 74 flush_icache_range((ulong)inst, (ulong)inst + 4); in kvm_patch_ins()
195 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsrd_len * 4); in kvm_patch_ins_mtmsrd()
255 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsr_len * 4); in kvm_patch_ins_mtmsr()
316 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_wrtee_len * 4); in kvm_patch_ins_wrtee()
350 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_wrteei_0_len * 4); in kvm_patch_ins_wrteei_0()
395 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtsrin_len * 4); in kvm_patch_ins_mtsrin()
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| /arch/arm/mach-lpc32xx/ |
| A D | pm.c | 98 flush_icache_range((unsigned long)TEMP_IRAM_AREA, in lpc32xx_pm_enter()
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| /arch/powerpc/kexec/ |
| A D | core_32.c | 55 flush_icache_range(reboot_code_buffer, in default_machine_kexec()
|