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Searched refs:fpr (Results 1 – 25 of 46) sorted by relevance

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/arch/mips/kernel/
A Dasm-offsets.c368 OFFSET(VCPU_FPR0, kvm_vcpu_arch, fpu.fpr[0]); in output_kvm_defines()
369 OFFSET(VCPU_FPR1, kvm_vcpu_arch, fpu.fpr[1]); in output_kvm_defines()
370 OFFSET(VCPU_FPR2, kvm_vcpu_arch, fpu.fpr[2]); in output_kvm_defines()
371 OFFSET(VCPU_FPR3, kvm_vcpu_arch, fpu.fpr[3]); in output_kvm_defines()
372 OFFSET(VCPU_FPR4, kvm_vcpu_arch, fpu.fpr[4]); in output_kvm_defines()
373 OFFSET(VCPU_FPR5, kvm_vcpu_arch, fpu.fpr[5]); in output_kvm_defines()
374 OFFSET(VCPU_FPR6, kvm_vcpu_arch, fpu.fpr[6]); in output_kvm_defines()
375 OFFSET(VCPU_FPR7, kvm_vcpu_arch, fpu.fpr[7]); in output_kvm_defines()
376 OFFSET(VCPU_FPR8, kvm_vcpu_arch, fpu.fpr[8]); in output_kvm_defines()
377 OFFSET(VCPU_FPR9, kvm_vcpu_arch, fpu.fpr[9]); in output_kvm_defines()
[all …]
A Dptrace.c432 membuf_store(to, get_fpr64(&target->thread.fpu.fpr[i], 0)); in fpr_get_msa()
444 if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t)) in fpr_get()
489 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val); in fpr_set_msa()
524 if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t)) in fpr_set()
616 membuf_write(to, &target->thread.fpu.fpr[i], cp_sz); in copy_pad_fprs()
642 membuf_write(&to, &target->thread.fpu.fpr, wr_size); in msa_get()
646 sizeof(target->thread.fpu.fpr[0])); in msa_get()
664 if (sizeof(target->thread.fpu.fpr[0]) == regset->size) { in msa_set()
667 &target->thread.fpu.fpr, in msa_set()
672 sizeof(target->thread.fpu.fpr[0])); in msa_set()
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A Dunaligned.c465 union fpureg *fpr; in emulate_load_store_insn() local
479 fpr = &current->thread.fpu.fpr[wd]; in emulate_load_store_insn()
483 if (!access_ok(addr, sizeof(*fpr))) in emulate_load_store_insn()
498 res = __copy_from_user_inatomic(fpr, addr, in emulate_load_store_insn()
499 sizeof(*fpr)); in emulate_load_store_insn()
511 write_msa_wr(wd, fpr, df); in emulate_load_store_insn()
519 if (!access_ok(addr, sizeof(*fpr))) in emulate_load_store_insn()
529 read_msa_wr(wd, fpr, df); in emulate_load_store_insn()
532 res = __copy_to_user_inatomic(addr, fpr, sizeof(*fpr)); in emulate_load_store_insn()
A Dkgdb.c154 memcpy((void *)&current->thread.fpu.fpr[fp_reg], mem, in dbg_set_reg()
190 memcpy(mem, (void *)&current->thread.fpu.fpr[fp_reg], in dbg_get_reg()
/arch/loongarch/kernel/
A Dasm-offsets.c135 OFFSET(THREAD_FPR0, loongarch_fpu, fpr[0]); in output_thread_fpu_defines()
136 OFFSET(THREAD_FPR1, loongarch_fpu, fpr[1]); in output_thread_fpu_defines()
137 OFFSET(THREAD_FPR2, loongarch_fpu, fpr[2]); in output_thread_fpu_defines()
138 OFFSET(THREAD_FPR3, loongarch_fpu, fpr[3]); in output_thread_fpu_defines()
139 OFFSET(THREAD_FPR4, loongarch_fpu, fpr[4]); in output_thread_fpu_defines()
140 OFFSET(THREAD_FPR5, loongarch_fpu, fpr[5]); in output_thread_fpu_defines()
141 OFFSET(THREAD_FPR6, loongarch_fpu, fpr[6]); in output_thread_fpu_defines()
142 OFFSET(THREAD_FPR7, loongarch_fpu, fpr[7]); in output_thread_fpu_defines()
143 OFFSET(THREAD_FPR8, loongarch_fpu, fpr[8]); in output_thread_fpu_defines()
144 OFFSET(THREAD_FPR9, loongarch_fpu, fpr[9]); in output_thread_fpu_defines()
[all …]
A Dptrace.c57 memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); in init_fp_ctx()
123 return membuf_write(to, &target->thread.fpu.fpr, in gfpr_get()
134 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0); in gfpr_get_simd()
169 &target->thread.fpu.fpr, in gfpr_set()
187 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val); in gfpr_set_simd()
271 membuf_write(to, &target->thread.fpu.fpr[i], cp_sz); in copy_pad_fprs()
299 membuf_write(&to, &target->thread.fpu.fpr, wr_size); in simd_get()
319 if (sizeof(target->thread.fpu.fpr[0]) == regset->size) { in simd_set()
322 &target->thread.fpu.fpr, in simd_set()
327 sizeof(target->thread.fpu.fpr[0])); in simd_set()
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A Dsignal.c93 __put_user(get_fpr64(&current->thread.fpu.fpr[i], 0), in copy_fpu_to_sigcontext()
113 set_fpr64(&current->thread.fpu.fpr[i], 0, fpr_val); in copy_fpu_from_sigcontext()
130 err |= __put_user(get_fpr64(&current->thread.fpu.fpr[i], 0), in copy_lsx_to_sigcontext()
132 err |= __put_user(get_fpr64(&current->thread.fpu.fpr[i], 1), in copy_lsx_to_sigcontext()
152 set_fpr64(&current->thread.fpu.fpr[i], 0, fpr_val); in copy_lsx_from_sigcontext()
154 set_fpr64(&current->thread.fpu.fpr[i], 1, fpr_val); in copy_lsx_from_sigcontext()
171 err |= __put_user(get_fpr64(&current->thread.fpu.fpr[i], 0), in copy_lasx_to_sigcontext()
197 set_fpr64(&current->thread.fpu.fpr[i], 0, fpr_val); in copy_lasx_from_sigcontext()
199 set_fpr64(&current->thread.fpu.fpr[i], 1, fpr_val); in copy_lasx_from_sigcontext()
201 set_fpr64(&current->thread.fpu.fpr[i], 2, fpr_val); in copy_lasx_from_sigcontext()
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A Dunaligned.c436 set_fpr64(&current->thread.fpu.fpr[insn.reg3_format.rd], 0, value); in emulate_load_store_insn()
446 value = get_fpr64(&current->thread.fpu.fpr[insn.reg3_format.rd], 0); in emulate_load_store_insn()
/arch/powerpc/kernel/
A Dsignal.h64 unsafe_put_user(__t->thread.fp_state.fpr[i][TS_VSRLOWOFFSET], \
84 unsafe_get_user(__t->thread.fp_state.fpr[i][TS_VSRLOWOFFSET], \
105 unsafe_put_user(__t->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET], \
125 unsafe_get_user(__t->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET], \
132 unsafe_copy_to_user(to, (task)->thread.fp_state.fpr, \
136 unsafe_copy_from_user((task)->thread.fp_state.fpr, from, \
142 return __copy_to_user(to, task->thread.fp_state.fpr, in copy_fpr_to_user()
149 return __copy_from_user(task->thread.fp_state.fpr, from, in copy_fpr_from_user()
155 unsafe_copy_to_user(to, (task)->thread.ckfp_state.fpr, \
160 return __copy_to_user(to, task->thread.ckfp_state.fpr, in copy_ckfpr_to_user()
[all …]
A Dsignal.c62 buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; in copy_vsx_to_user()
75 task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; in copy_vsx_from_user()
116 buf[i] = task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET]; in copy_ckvsx_to_user()
129 task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; in copy_ckvsx_from_user()
/arch/loongarch/include/asm/
A Dprocessor.h68 static inline u##width get_fpr##width(union fpureg *fpr, unsigned idx) \
70 return fpr->val##width[FPR_IDX(width, idx)]; \
73 static inline void set_fpr##width(union fpureg *fpr, unsigned int idx, \
76 fpr->val##width[FPR_IDX(width, idx)] = val; \
86 union fpureg fpr[NUM_FPU_REGS]; member
183 .fpr = {{{0,},},}, \
/arch/mips/loongson64/
A Dcop2-ex.c98 set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0, value); in loongson_cu2_call()
99 set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0, value_next); in loongson_cu2_call()
131 value_next = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0); in loongson_cu2_call()
137 value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0); in loongson_cu2_call()
203 set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value); in loongson_cu2_call()
219 set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value); in loongson_cu2_call()
283 value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0); in loongson_cu2_call()
301 value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0); in loongson_cu2_call()
/arch/mips/include/asm/
A Dprocessor.h103 static inline u##width get_fpr##width(union fpureg *fpr, unsigned idx) \
105 return fpr->val##width[FPR_IDX(width, idx)]; \
108 static inline void set_fpr##width(union fpureg *fpr, unsigned idx, \
111 fpr->val##width[FPR_IDX(width, idx)] = val; \
124 union fpureg fpr[NUM_FPU_REGS]; member
287 .fpr = {{{0,},},}, \
A Dfpu.h228 memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); in init_fp_ctx()
263 return tsk->thread.fpu.fpr; in get_fpu_regs()
/arch/powerpc/kernel/ptrace/
A Dptrace-novsx.c26 offsetof(struct thread_fp_state, fpr[32])); in fpr_get()
55 offsetof(struct thread_fp_state, fpr[32])); in fpr_set()
A Dptrace-vsx.c109 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; in vsr_get()
139 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; in vsr_set()
145 target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; in vsr_set()
A Dptrace-fpu.c23 *data = ((u32 *)child->thread.fp_state.fpr)[fpidx]; in ptrace_get_fpr()
49 ((u32 *)child->thread.fp_state.fpr)[fpidx] = data; in ptrace_put_fpr()
A Dptrace32.c97 tmp = ((unsigned int *)child->thread.fp_state.fpr) in compat_arch_ptrace()
138 tmp = child->thread.fp_state.fpr[numReg - PT_FPR0][0]; in compat_arch_ptrace()
197 ((unsigned int *)child->thread.fp_state.fpr) in compat_arch_ptrace()
240 tmp = &child->thread.fp_state.fpr[numReg - PT_FPR0][0]; in compat_arch_ptrace()
/arch/s390/include/asm/
A Dfpu-insn.h66 static __always_inline void fpu_ld(unsigned short fpr, freg_t *reg) in fpu_ld() argument
71 : [fpr] "I" (fpr), [reg] "Q" (reg->ui) in fpu_ld()
113 static __always_inline void fpu_std(unsigned short fpr, freg_t *reg) in fpu_std() argument
118 : [fpr] "I" (fpr) in fpu_std()
/arch/powerpc/include/asm/
A Dkvm_booke.h94 vcpu->arch.fp.fpr[i][TS_FPROFFSET] = val; in kvmppc_set_fpr()
99 return vcpu->arch.fp.fpr[i][TS_FPROFFSET]; in kvmppc_get_fpr()
A Dprocessor.h79 #define TS_FPR(i) fp_state.fpr[i][TS_FPROFFSET]
80 #define TS_CKFPR(i) ckfp_state.fpr[i][TS_FPROFFSET]
84 u64 fpr[32][TS_FPRWIDTH] __attribute__((aligned(16))); member
/arch/mips/kvm/
A Dmips.c680 v = get_fpr32(&fpu->fpr[idx], 0); in kvm_mips_get_reg()
691 v = get_fpr64(&fpu->fpr[idx], 0); in kvm_mips_get_reg()
714 vs[0] = get_fpr64(&fpu->fpr[idx], 0); in kvm_mips_get_reg()
715 vs[1] = get_fpr64(&fpu->fpr[idx], 1); in kvm_mips_get_reg()
718 vs[0] = get_fpr64(&fpu->fpr[idx], 1); in kvm_mips_get_reg()
814 set_fpr32(&fpu->fpr[idx], 0, v); in kvm_mips_set_reg()
825 set_fpr64(&fpu->fpr[idx], 0, v); in kvm_mips_set_reg()
845 set_fpr64(&fpu->fpr[idx], 0, vs[0]); in kvm_mips_set_reg()
846 set_fpr64(&fpu->fpr[idx], 1, vs[1]); in kvm_mips_set_reg()
849 set_fpr64(&fpu->fpr[idx], 1, vs[0]); in kvm_mips_set_reg()
[all …]
/arch/mips/math-emu/
A Dcp1emu.c431 union fpureg *fpr; in isBranchInstr() local
706 fpr = &current->thread.fpu.fpr[insn.i_format.rt]; in isBranchInstr()
707 bit0 = get_fpr32(fpr, 0) & 0x1; in isBranchInstr()
812 set_fpr32(&ctx->fpr[x], i, 0); \
825 set_fpr32(&ctx->fpr[x], i, 0); \
833 unsigned int fpr, i; \
835 set_fpr64(&ctx->fpr[fpr], 0, di); \
837 set_fpr64(&ctx->fpr[fpr], i, 0); \
978 union fpureg *fpr; in cop1Emulate() local
1191 fpr = &current->thread.fpu.fpr[MIPSInst_RT(ir)]; in cop1Emulate()
[all …]
/arch/loongarch/include/uapi/asm/
A Dptrace.h44 uint64_t fpr[32]; member
A Dkvm.h41 } fpr[32]; member

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