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Searched refs:gc (Results 1 – 25 of 41) sorted by relevance

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/arch/powerpc/platforms/44x/
A Dgpio.c60 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in ppc4xx_gpio_get()
80 struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); in ppc4xx_gpio_set()
85 __ppc4xx_gpio_set(gc, gpio, val); in ppc4xx_gpio_set()
134 __ppc4xx_gpio_set(gc, gpio, val); in ppc4xx_gpio_dir_out()
166 struct gpio_chip *gc; in ppc4xx_add_gpiochips() local
177 gc = &mm_gc->gc; in ppc4xx_add_gpiochips()
179 gc->ngpio = 32; in ppc4xx_add_gpiochips()
180 gc->direction_input = ppc4xx_gpio_dir_in; in ppc4xx_add_gpiochips()
181 gc->direction_output = ppc4xx_gpio_dir_out; in ppc4xx_add_gpiochips()
182 gc->get = ppc4xx_gpio_get; in ppc4xx_add_gpiochips()
[all …]
/arch/powerpc/sysdev/
A Dcpm_common.c118 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm2_gpio32_get()
143 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm2_gpio32_set()
197 struct gpio_chip *gc; in cpm2_gpiochip_add32() local
206 gc = &mm_gc->gc; in cpm2_gpiochip_add32()
209 gc->ngpio = 32; in cpm2_gpiochip_add32()
210 gc->direction_input = cpm2_gpio32_dir_in; in cpm2_gpiochip_add32()
211 gc->direction_output = cpm2_gpio32_dir_out; in cpm2_gpiochip_add32()
212 gc->get = cpm2_gpio32_get; in cpm2_gpiochip_add32()
213 gc->set = cpm2_gpio32_set; in cpm2_gpiochip_add32()
214 gc->parent = dev; in cpm2_gpiochip_add32()
[all …]
/arch/powerpc/platforms/8xx/
A Dcpm1.c379 struct gpio_chip gc; member
496 gc = &cpm1_gc->gc; in cpm1_gpiochip_add16()
497 gc->base = -1; in cpm1_gpiochip_add16()
498 gc->ngpio = 16; in cpm1_gpiochip_add16()
504 gc->parent = dev; in cpm1_gpiochip_add16()
508 if (!gc->label) in cpm1_gpiochip_add16()
619 gc = &cpm1_gc->gc; in cpm1_gpiochip_add32()
620 gc->base = -1; in cpm1_gpiochip_add32()
621 gc->ngpio = 32; in cpm1_gpiochip_add32()
626 gc->parent = dev; in cpm1_gpiochip_add32()
[all …]
/arch/powerpc/platforms/83xx/
A Dmcu_mpc8349emitx.c36 struct gpio_chip gc; member
122 struct gpio_chip *gc = &mcu->gc; in mcu_gpiochip_add() local
124 gc->owner = THIS_MODULE; in mcu_gpiochip_add()
126 gc->can_sleep = 1; in mcu_gpiochip_add()
127 gc->ngpio = MCU_NUM_GPIO; in mcu_gpiochip_add()
128 gc->base = -1; in mcu_gpiochip_add()
129 gc->set = mcu_gpio_set; in mcu_gpiochip_add()
131 gc->parent = dev; in mcu_gpiochip_add()
133 return gpiochip_add_data(gc, mcu); in mcu_gpiochip_add()
138 kfree(mcu->gc.label); in mcu_gpiochip_remove()
[all …]
/arch/arm/mach-imx/
A Dirq-common.c14 struct irq_chip_generic *gc; in mxc_set_irq_fiq() local
20 gc = irq_get_chip_data(irq); in mxc_set_irq_fiq()
21 if (gc && gc->private) { in mxc_set_irq_fiq()
22 exirq = gc->private; in mxc_set_irq_fiq()
A Davic.c84 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in avic_irq_suspend() local
85 struct irq_chip_type *ct = gc->chip_types; in avic_irq_suspend()
89 imx_writel(gc->wake_active, avic_base + ct->regs.mask); in avic_irq_suspend()
100 imx_writel(~gc->wake_active, mx25_ccm_base + offs); in avic_irq_suspend()
106 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in avic_irq_resume() local
107 struct irq_chip_type *ct = gc->chip_types; in avic_irq_resume()
127 struct irq_chip_generic *gc; in avic_init_gc() local
132 gc->private = &avic_extra_irq; in avic_init_gc()
133 gc->wake_enabled = IRQ_MSK(32); in avic_init_gc()
135 ct = gc->chip_types; in avic_init_gc()
[all …]
A Dtzic.c75 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in tzic_irq_suspend() local
78 imx_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx)); in tzic_irq_suspend()
102 struct irq_chip_generic *gc; in tzic_init_gc() local
105 gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, in tzic_init_gc()
107 gc->private = &tzic_extra_irq; in tzic_init_gc()
108 gc->wake_enabled = IRQ_MSK(32); in tzic_init_gc()
110 ct = gc->chip_types; in tzic_init_gc()
119 irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); in tzic_init_gc()
/arch/arm/plat-orion/
A Dirq.c24 struct irq_chip_generic *gc; in orion_irq_init() local
32 gc = irq_alloc_generic_chip("orion_irq", 1, irq_start, maskaddr, in orion_irq_init()
34 ct = gc->chip_types; in orion_irq_init()
37 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE, in orion_irq_init()
A Dgpio.c358 struct orion_gpio_chip *ochip = gc->private; in gpio_irq_set_type()
501 guard(raw_spinlock)(&gc->lock); in orion_gpio_unmask_irq()
502 reg_val = irq_reg_readl(gc, ct->regs.mask); in orion_gpio_unmask_irq()
504 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_unmask_irq()
514 guard(raw_spinlock)(&gc->lock); in orion_gpio_mask_irq()
515 reg_val = irq_reg_readl(gc, ct->regs.mask); in orion_gpio_mask_irq()
517 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_mask_irq()
526 struct irq_chip_generic *gc; in orion_gpio_init() local
578 gc = irq_alloc_generic_chip("orion_gpio_irq", 2, in orion_gpio_init()
581 gc->private = ochip; in orion_gpio_init()
[all …]
/arch/sh/boards/mach-se/7722/
A Dirq.c68 struct irq_chip_generic *gc; in se7722_gc_init() local
74 gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs, in se7722_gc_init()
76 if (unlikely(!gc)) in se7722_gc_init()
79 ct = gc->chip_types; in se7722_gc_init()
85 irq_setup_generic_chip(gc, IRQ_MSK(SE7722_FPGA_IRQ_NR), in se7722_gc_init()
/arch/powerpc/platforms/52xx/
A Dmpc52xx_gpt.c97 struct gpio_chip gc; member
317 mpc52xx_gpt_gpio_set(gc, gpio, val); in mpc52xx_gpt_gpio_dir_out()
330 if (!gpt->gc.label) { in mpc52xx_gpt_gpio_setup()
335 gpt->gc.ngpio = 1; in mpc52xx_gpt_gpio_setup()
336 gpt->gc.direction_input = mpc52xx_gpt_gpio_dir_in; in mpc52xx_gpt_gpio_setup()
337 gpt->gc.direction_output = mpc52xx_gpt_gpio_dir_out; in mpc52xx_gpt_gpio_setup()
338 gpt->gc.get = mpc52xx_gpt_gpio_get; in mpc52xx_gpt_gpio_setup()
339 gpt->gc.set = mpc52xx_gpt_gpio_set; in mpc52xx_gpt_gpio_setup()
340 gpt->gc.base = -1; in mpc52xx_gpt_gpio_setup()
341 gpt->gc.parent = gpt->dev; in mpc52xx_gpt_gpio_setup()
[all …]
/arch/sh/boards/mach-se/7343/
A Dirq.c70 struct irq_chip_generic *gc; in se7343_gc_init() local
76 gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs, in se7343_gc_init()
78 if (unlikely(!gc)) in se7343_gc_init()
81 ct = gc->chip_types; in se7343_gc_init()
87 irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR), in se7343_gc_init()
/arch/arm/common/
A Dsa1111.c112 struct gpio_chip gc; member
478 return container_of(gc, struct sa1111, gc); in gc_to_sa1111()
517 struct sa1111 *sachip = gc_to_sa1111(gc); in sa1111_gpio_get_direction()
613 sachip->gc.label = "sa1111"; in sa1111_setup_gpios()
614 sachip->gc.parent = sachip->dev; in sa1111_setup_gpios()
615 sachip->gc.owner = THIS_MODULE; in sa1111_setup_gpios()
619 sachip->gc.get = sa1111_gpio_get; in sa1111_setup_gpios()
620 sachip->gc.set = sa1111_gpio_set; in sa1111_setup_gpios()
622 sachip->gc.to_irq = sa1111_gpio_to_irq; in sa1111_setup_gpios()
623 sachip->gc.base = -1; in sa1111_setup_gpios()
[all …]
/arch/arm/mach-s3c/
A Dgpio-samsung.c506 struct gpio_chip *gc = &chip->chip; in samsung_gpiolib_add() local
510 BUG_ON(!gc->label); in samsung_gpiolib_add()
511 BUG_ON(!gc->ngpio); in samsung_gpiolib_add()
515 if (!gc->direction_input) in samsung_gpiolib_add()
517 if (!gc->direction_output) in samsung_gpiolib_add()
519 if (!gc->set) in samsung_gpiolib_add()
520 gc->set = samsung_gpiolib_set; in samsung_gpiolib_add()
521 if (!gc->get) in samsung_gpiolib_add()
522 gc->get = samsung_gpiolib_get; in samsung_gpiolib_add()
528 gc->label); in samsung_gpiolib_add()
[all …]
/arch/riscv/kvm/
A Daia.c405 const struct imsic_global_config *gc; in kvm_riscv_aia_alloc_hgei() local
422 gc = imsic_get_global_config(); in kvm_riscv_aia_alloc_hgei()
423 lc = (gc) ? per_cpu_ptr(gc->local, cpu) : NULL; in kvm_riscv_aia_alloc_hgei()
614 const struct imsic_global_config *gc; in kvm_riscv_aia_init() local
618 gc = imsic_get_global_config(); in kvm_riscv_aia_init()
631 if (gc) in kvm_riscv_aia_init()
633 BIT(gc->guest_index_bits) - 1); in kvm_riscv_aia_init()
639 if (gc && kvm_riscv_aia_nr_hgei) in kvm_riscv_aia_init()
640 kvm_riscv_aia_max_ids = gc->nr_guest_ids + 1; in kvm_riscv_aia_init()
/arch/arm/mach-omap1/
A Dboard-osk.c208 static int osk_tps_setup(struct i2c_client *client, struct gpio_chip *gc) in osk_tps_setup() argument
217 d = gpiochip_request_own_desc(gc, OSK_TPS_GPIO_USB_PWR_EN, "n_vbus_en", in osk_tps_setup()
226 eth_reset = gpiochip_request_own_desc(gc, OSK_TPS_GPIO_LAN_RESET, "smc_reset", in osk_tps_setup()
230 vdd_dsp = gpiochip_request_own_desc(gc, OSK_TPS_GPIO_DSP_PWR_EN, "dsp_power", in osk_tps_setup()
255 static void osk_tps_teardown(struct i2c_client *client, struct gpio_chip *gc) in osk_tps_teardown() argument
A Dirq.c168 struct irq_chip_generic *gc; in omap_alloc_gc() local
171 gc = irq_alloc_generic_chip("MPU", 1, irq_start, base, in omap_alloc_gc()
173 ct = gc->chip_types; in omap_alloc_gc()
179 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, in omap_alloc_gc()
/arch/arm/mach-sa1100/
A Dneponset.c57 #define to_neponset_gpio_chip(x) container_of(x, struct neponset_gpio_chip, gc)
209 struct gpio_chip *gc; in neponset_init_gpio() local
211 gc = gpio_reg_init(dev, reg, -1, num, label, in ? 0xffffffff : 0, in neponset_init_gpio()
213 if (IS_ERR(gc)) in neponset_init_gpio()
214 return PTR_ERR(gc); in neponset_init_gpio()
216 *gcp = gc; in neponset_init_gpio()
A Dassabet.c89 struct gpio_chip *gc; in assabet_init_gpio() local
93 gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val, in assabet_init_gpio()
96 if (IS_ERR(gc)) in assabet_init_gpio()
99 assabet_bcr_gc = gc; in assabet_init_gpio()
/arch/arm/mach-omap2/
A Dprm_common.c270 struct irq_chip_generic *gc; in omap_prcm_register_chain_handler() local
323 gc = irq_alloc_generic_chip("PRCM", 1, in omap_prcm_register_chain_handler()
327 if (!gc) { in omap_prcm_register_chain_handler()
331 ct = gc->chip_types; in omap_prcm_register_chain_handler()
339 irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0); in omap_prcm_register_chain_handler()
340 prcm_irq_chips[i] = gc; in omap_prcm_register_chain_handler()
/arch/arm64/boot/dts/freescale/
A Dimx8-ss-gpu0.dtsi16 compatible = "vivante,gc";
/arch/powerpc/platforms/embedded6xx/
A DKconfig86 More information at: <http://gc-linux.sourceforge.net/>
94 More information at: <http://gc-linux.sourceforge.net/>
/arch/arm/boot/dts/st/
A Dstm32mp157.dtsi12 compatible = "vivante,gc";
/arch/arm/boot/dts/marvell/
A Dmmp3.dtsi320 compatible = "vivante,gc";
332 compatible = "vivante,gc";
/arch/mips/include/asm/octeon/
A Dcvmx-pciercx-defs.h281 __BITFIELD_FIELD(uint32_t gc:1,

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