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/arch/mips/loongson2ef/common/cs5536/
A Dcs5536_ehci.c17 u32 hi = 0, lo = value; in pci_ehci_write_reg() local
23 hi |= PCI_COMMAND_MASTER; in pci_ehci_write_reg()
25 hi &= ~PCI_COMMAND_MASTER; in pci_ehci_write_reg()
28 hi |= PCI_COMMAND_MEMORY; in pci_ehci_write_reg()
30 hi &= ~PCI_COMMAND_MEMORY; in pci_ehci_write_reg()
60 hi &= 0x003f0000; in pci_ehci_write_reg()
61 hi |= (value & 0x3f) << 16; in pci_ehci_write_reg()
66 hi &= ~0x00003f00; in pci_ehci_write_reg()
67 hi |= value & 0x00003f00; in pci_ehci_write_reg()
78 u32 hi, lo; in pci_ehci_read_reg() local
[all …]
A Dcs5536_ide.c17 u32 hi = 0, lo = value; in pci_ide_write_reg() local
21 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); in pci_ide_write_reg()
26 _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); in pci_ide_write_reg()
33 _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); in pci_ide_write_reg()
39 _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo); in pci_ide_write_reg()
40 hi &= 0xffffff00; in pci_ide_write_reg()
41 hi |= (value >> 8); in pci_ide_write_reg()
42 _wrmsr(SB_MSR_REG(SB_CTRL), hi, lo); in pci_ide_write_reg()
74 _wrmsr(IDE_MSR_REG(IDE_DTC), hi, lo); in pci_ide_write_reg()
99 u32 hi, lo; in pci_ide_read_reg() local
[all …]
A Dcs5536_ohci.c17 u32 hi = 0, lo = value; in pci_ohci_write_reg() local
21 _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo); in pci_ohci_write_reg()
23 hi |= PCI_COMMAND_MASTER; in pci_ohci_write_reg()
25 hi &= ~PCI_COMMAND_MASTER; in pci_ohci_write_reg()
28 hi |= PCI_COMMAND_MEMORY; in pci_ohci_write_reg()
30 hi &= ~PCI_COMMAND_MEMORY; in pci_ohci_write_reg()
31 _wrmsr(USB_MSR_REG(USB_OHCI), hi, lo); in pci_ohci_write_reg()
38 _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); in pci_ohci_write_reg()
73 u32 hi, lo; in pci_ohci_read_reg() local
82 if (hi & PCI_COMMAND_MASTER) in pci_ohci_read_reg()
[all …]
A Dcs5536_isa.c51 u32 hi, lo; in divil_lbar_enable() local
60 hi |= 0x01; in divil_lbar_enable()
70 u32 hi, lo; in divil_lbar_disable() local
75 hi &= ~0x01; in divil_lbar_disable()
94 hi = 0x0000f001; in pci_isa_write_bar()
113 u32 hi, lo; in pci_isa_read_bar() local
171 hi &= 0xffffff00; in pci_isa_write_reg()
172 hi |= (value >> 8); in pci_isa_write_reg()
231 u32 hi, lo; in pci_isa_read_reg() local
242 if (hi & 0x01) in pci_isa_read_reg()
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A Dcs5536_acc.c17 u32 hi = 0, lo = value; in pci_acc_write_reg() local
21 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); in pci_acc_write_reg()
26 _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); in pci_acc_write_reg()
30 _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); in pci_acc_write_reg()
33 _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); in pci_acc_write_reg()
64 u32 hi, lo; in pci_acc_read_reg() local
75 && ((hi & 0xf0000000) == 0xa0000000)) in pci_acc_read_reg()
77 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); in pci_acc_read_reg()
84 _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); in pci_acc_read_reg()
90 _rdmsr(ACC_MSR_REG(ACC_CAP), &hi, &lo); in pci_acc_read_reg()
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/arch/csky/kernel/
A Dperf_event.c92 uint32_t lo, hi, tmp; in csky_pmu_read_cc() local
99 } while (hi != tmp); in csky_pmu_read_cc()
116 uint32_t lo, hi, tmp; in csky_pmu_read_ic() local
123 } while (hi != tmp); in csky_pmu_read_ic()
140 uint32_t lo, hi, tmp; in csky_pmu_read_icac() local
147 } while (hi != tmp); in csky_pmu_read_icac()
171 } while (hi != tmp); in csky_pmu_read_icmc()
195 } while (hi != tmp); in csky_pmu_read_dcac()
219 } while (hi != tmp); in csky_pmu_read_dcmc()
243 } while (hi != tmp); in csky_pmu_read_l2ac()
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/arch/riscv/net/
A Dbpf_jit_comp32.c281 emit(rv_xori(hi(rd), hi(rd), -1), ctx); in emit_alu_i64()
291 emit(rv_slli(hi(rd), hi(rd), imm), ctx); in emit_alu_i64()
306 emit(rv_srli(hi(rd), hi(rd), imm), ctx); in emit_alu_i64()
312 emit(rv_srai(hi(rd), hi(rd), 31), ctx); in emit_alu_i64()
417 emit(rv_addi(hi(rd), hi(rs), 0), ctx); in emit_alu_r64()
422 emit(rv_slli(hi(rd), hi(rd), 1), ctx); in emit_alu_r64()
428 emit(rv_add(hi(rd), hi(rd), hi(rs)), ctx); in emit_alu_r64()
440 emit(rv_and(hi(rd), hi(rd), hi(rs)), ctx); in emit_alu_r64()
444 emit(rv_or(hi(rd), hi(rd), hi(rs)), ctx); in emit_alu_r64()
448 emit(rv_xor(hi(rd), hi(rd), hi(rs)), ctx); in emit_alu_r64()
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/arch/parisc/net/
A Dbpf_jit_comp32.c484 emit(hppa_shr(hi(rd), imm, hi(rd)), ctx); in emit_alu_i64()
493 emit(hppa_extrws(hi(rd), 0, 31, hi(rd)), ctx); in emit_alu_i64()
496 emit(hppa_extrws(hi(rd), 0, 31, hi(rd)), ctx); in emit_alu_i64()
581 emit_hppa_copy(hi(rs), hi(rd), ctx); in emit_alu_r64()
585 emit(hppa_addc(hi(rd), hi(rs), hi(rd)), ctx); in emit_alu_r64()
589 emit(hppa_subb(hi(rd), hi(rs), hi(rd)), ctx); in emit_alu_r64()
593 emit(hppa_and(hi(rd), hi(rs), hi(rd)), ctx); in emit_alu_r64()
597 emit(hppa_or(hi(rd), hi(rs), hi(rd)), ctx); in emit_alu_r64()
601 emit_hppa_xor(hi(rd), hi(rs), hi(rd), ctx); in emit_alu_r64()
746 emit(hppa_bne(hi(rs1), hi(rs2), JUMP(1)), ctx); in emit_branch_r64()
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/arch/mips/net/
A Dbpf_jit_comp32.c232 emit(ctx, addiu, hi(dst), hi(dst), -1); in emit_alu_i64()
240 emit(ctx, addiu, hi(dst), hi(dst), 1); in emit_alu_i64()
280 emit(ctx, addu, hi(dst), hi(dst), hi(src)); in emit_alu_r64()
287 emit(ctx, subu, hi(dst), hi(dst), hi(src)); in emit_alu_r64()
293 emit(ctx, or, hi(dst), hi(dst), hi(src)); in emit_alu_r64()
298 emit(ctx, and, hi(dst), hi(dst), hi(src)); in emit_alu_r64()
303 emit(ctx, xor, hi(dst), hi(dst), hi(src)); in emit_alu_r64()
358 emit(ctx, sra, hi(dst), hi(dst), 31); in emit_shift_i64()
610 emit(ctx, wsbh, hi(dst), hi(dst)); in emit_bswap_r64()
860 emit(ctx, move, hi(src), hi(r0)); in emit_atomic_r64()
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/arch/sparc/kernel/
A Dtrampoline_64.S85 sethi %hi(0x80000000), %g5
101 sethi %hi(0x80000000), %g2
129 sethi %hi(KERNBASE), %l3
151 sethi %hi(itlb_load), %g2
170 sethi %hi(p1275buf), %g2
184 sethi %hi(dtlb_load), %g2
203 sethi %hi(p1275buf), %g2
221 sethi %hi(KERNBASE), %l3
298 sethi %hi(tlb_type), %g3
340 sethi %hi(is_sun4v), %o0
[all …]
/arch/sparc/mm/
A Dultra.S42 sethi %hi(KERNBASE), %g3
74 sethi %hi(KERNBASE), %o4
106 sethi %hi(KERNBASE), %o4
124 sethi %hi(PAGE_SIZE), %o4
132 2: sethi %hi(KERNBASE), %o3
181 sethi %hi(KERNBASE), %o1
196 sethi %hi(PAGE_SIZE), %g2
265 sethi %hi(KERNBASE), %o2
290 sethi %hi(KERNBASE), %o4
320 sethi %hi(KERNBASE), %o4
[all …]
A Dviking.S39 sethi %hi(PAGE_OFFSET), %g2
45 sethi %hi(0x80000000), %o4
46 sethi %hi(VIKING_PTAG_VALID), %o5
47 sethi %hi(2*PAGE_SIZE), %o0
48 sethi %hi(PAGE_SIZE), %g7
92 sethi %hi(PAGE_OFFSET), %g2
95 sethi %hi(MXCC_SRCSTREAM), %o3 ! assume %hi(MXCC_SRCSTREAM) == %hi(MXCC_DESTSTREAM)
206 sethi %hi(sun4dsmp_flush_tlb_spin), %g3
220 sethi %hi(sun4dsmp_flush_tlb_spin), %g3
239 sethi %hi(sun4dsmp_flush_tlb_spin), %g3
[all …]
/arch/x86/kernel/cpu/
A Dcentaur.c24 u32 lo, hi; in init_c3() local
32 rdmsr(MSR_VIA_FCR, lo, hi); in init_c3()
34 wrmsr(MSR_VIA_FCR, lo, hi); in init_c3()
40 rdmsr(MSR_VIA_RNG, lo, hi); in init_c3()
42 wrmsr(MSR_VIA_RNG, lo, hi); in init_c3()
54 rdmsr(MSR_VIA_FCR, lo, hi); in init_c3()
56 wrmsr(MSR_VIA_FCR, lo, hi); in init_c3()
120 u32 lo, hi, newlo; in init_centaur() local
180 rdmsr(MSR_IDT_FCR1, lo, hi); in init_centaur()
186 wrmsr(MSR_IDT_FCR1, newlo, hi); in init_centaur()
A Dzhaoxin.c23 u32 lo, hi; in init_zhaoxin_cap() local
31 rdmsr(MSR_ZHAOXIN_FCR57, lo, hi); in init_zhaoxin_cap()
34 wrmsr(MSR_ZHAOXIN_FCR57, lo, hi); in init_zhaoxin_cap()
40 rdmsr(MSR_ZHAOXIN_FCR57, lo, hi); in init_zhaoxin_cap()
43 wrmsr(MSR_ZHAOXIN_FCR57, lo, hi); in init_zhaoxin_cap()
/arch/sparc/lib/
A Dfls.S17 sethi %hi(0xffff0000), %g3
22 sethi %hi(0xff000000), %g3
25 sethi %hi(0xf0000000), %g3
32 sethi %hi(0xf0000000), %g3
36 sethi %hi(0xc0000000), %g3
58 sethi %hi(0xff000000), %g3
A Dclear_page.S44 sethi %hi(PAGE_OFFSET), %g2
45 sethi %hi(PAGE_SIZE), %o4
48 sethi %hi(PAGE_KERNEL_LOCKED), %g3
56 sethi %hi(TLBTEMP_BASE), %o3
70 sethi %hi(KERNBASE), %g1
80 sethi %hi(PAGE_SIZE/64), %o1
A DGENpatch.S10 sethi %hi(NEW), %g1; \
12 sethi %hi(OLD), %g2; \
15 sethi %hi(BRANCH_ALWAYS), %g3; \
21 sethi %hi(NOP), %g3; \
A DNG2patch.S10 sethi %hi(NEW), %g1; \
12 sethi %hi(OLD), %g2; \
15 sethi %hi(BRANCH_ALWAYS), %g3; \
21 sethi %hi(NOP), %g3; \
A DNGpatch.S10 sethi %hi(NEW), %g1; \
12 sethi %hi(OLD), %g2; \
15 sethi %hi(BRANCH_ALWAYS), %g3; \
21 sethi %hi(NOP), %g3; \
A DU3patch.S10 sethi %hi(NEW), %g1; \
12 sethi %hi(OLD), %g2; \
15 sethi %hi(BRANCH_ALWAYS), %g3; \
21 sethi %hi(NOP), %g3; \
/arch/riscv/include/asm/
A Dtimex.h73 u32 hi, lo; in get_cycles64() local
76 hi = get_cycles_hi(); in get_cycles64()
78 } while (hi != get_cycles_hi()); in get_cycles64()
80 return ((u64)hi << 32) | lo; in get_cycles64()
/arch/mips/loongson2ef/lemote-2f/
A Dreset.c44 u32 hi, lo; in fl2f_reboot() local
45 _rdmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), &hi, &lo); in fl2f_reboot()
47 _wrmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), hi, lo); in fl2f_reboot()
53 u32 hi, lo, val; in fl2f_shutdown() local
57 _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &lo); in fl2f_shutdown()
/arch/m68k/ifpsp060/src/
A Dilsp.S75 # 0x8(sp) = hi(dividend) #
528 # | hi(mplier) * hi(mplicand)| #
549 swap %d3 # hi(mr) in lo d3
550 swap %d4 # hi(md) in lo d4
556 mulu.w %d4,%d3 # [4] hi(mr) * hi(md)
572 clr.w %d2 # clear hi([3])
654 # | hi(mplier) * hi(mplicand)| #
675 swap %d3 # hi(mr) in lo d3
676 swap %d4 # hi(md) in lo d4
682 mulu.w %d4,%d3 # [4] hi(mr) * hi(md)
[all …]
/arch/riscv/kernel/
A Dparavirt.c57 static int sbi_sta_steal_time_set_shmem(unsigned long lo, unsigned long hi, in sbi_sta_steal_time_set_shmem() argument
63 lo, hi, flags, 0, 0, 0); in sbi_sta_steal_time_set_shmem()
65 if (lo == SBI_SHMEM_DISABLE && hi == SBI_SHMEM_DISABLE) in sbi_sta_steal_time_set_shmem()
80 unsigned long hi = IS_ENABLED(CONFIG_32BIT) ? upper_32_bits((u64)pa) : 0; in pv_time_cpu_online() local
82 return sbi_sta_steal_time_set_shmem(lo, hi, 0); in pv_time_cpu_online()
/arch/x86/kernel/apic/
A Dx2apic_uv_x.c1193 hi->gpa_mask = mn.m_val ? in uv_init_hub_info()
1197 hi->m_val = mn.m_val; in uv_init_hub_info()
1198 hi->n_val = mn.n_val; in uv_init_hub_info()
1217 hi->gnode_upper = (u64)hi->gnode_extra << mn.m_val; in uv_init_hub_info()
1225 hi->gpa_mask = (1UL << hi->gpa_shift) - 1; in uv_init_hub_info()
1227 hi->global_mmr_base = in uv_init_hub_info()
1233 get_lowmem_redirect(&hi->lowmem_remap_base, &hi->lowmem_remap_top); in uv_init_hub_info()
1238 pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", hi->n_val, hi->m_val, hi->m_shift, hi->n_lshift); in uv_init_hub_info()
1239 …_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", hi->gpa_mask, hi->gpa_shift, hi->pnode_mask, … in uv_init_hub_info()
1241 if (hi->global_gru_base) in uv_init_hub_info()
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