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/arch/powerpc/crypto/
A DKconfig63 Support for cryptographic acceleration instructions on Power10 or
67 bool "Support for VMX cryptographic acceleration instructions"
70 Support for VMX cryptographic acceleration instructions.
82 Support for VMX cryptographic acceleration instructions on Power8 CPU.
/arch/arm/kernel/
A Dphys2virt.S41 mov r0, r3, lsr #21 @ constant for add/sub instructions
77 @ In the non-LPAE case, all patchable instructions are MOVW
78 @ instructions, where we need to patch in the offset into the
131 @ in BE8, we load data in BE, but instructions still in LE
155 @ In the non-LPAE case, all patchable instructions are ADD or SUB
156 @ instructions, where we need to patch in the offset into the
173 @ instructions based on bits 23:22 of the opcode, and ADD/SUB can be
/arch/sparc/crypto/
A DKconfig27 Architecture: sparc64 using crypto instructions, when available
37 Architecture: sparc64 using crypto instructions
/arch/nios2/platform/
A DKconfig.platform54 comment "Nios II instructions"
83 bool "Enable BMX instructions"
87 the BMX Bit Manipulation Extension instructions. Enables
91 bool "Enable CDX instructions"
95 the CDX Bit Manipulation Extension instructions. Enables
/arch/m68k/ifpsp060/
A Dfplsp.doc36 FP instructions not implemented in 68060 hardware. These
37 instructions normally take exception vector #11
40 By re-compiling a program that uses these instructions, and
42 instructions, a program can avoid the overhead associated
110 this exception using implemented floating-point instructions.
120 The package does not attempt to correctly emulate instructions
126 subroutine calls for all fp instructions. The code does NOT emulate
A Disp.doc36 This exception is taken when any of the integer instructions
38 isp.sa provides full emulation support for these instructions.
40 The unimplemented integer instructions are:
174 The instructions "cas2" and "cas" (when used with a misaligned effective
176 060ISP is installed properly, these instructions will enter through the
A Dfskeleton.S207 | vector number 11: FP Unimplemented Instructions, FP implemented instructions when
208 | the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
221 | vector number 11: FP Unimplemented Instructions, FP implemented instructions when
222 | the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
A Dilsp.doc35 and the "cmp2" instruction. These instructions are not
39 By re-compiling a program that uses these instructions, and
41 instructions, a program can avoid the overhead associated with
/arch/openrisc/
A DKconfig132 This config enables gcc to generate l.cmov instructions when compiling
145 This config enables gcc to generate l.ror instructions when compiling
158 This config enables gcc to generate l.rori instructions when compiling
168 bool "Have instructions l.ext* for sign extension"
171 This config enables gcc to generate l.ext* instructions when compiling
176 l.exths, l.extbs, l.exthz and l.extbz size extend instructions.
/arch/mips/crypto/
A DKconfig13 Architecture: mips OCTEON using crypto instructions, when available
/arch/arm/crypto/
A DKconfig30 - PMULL (Polynomial Multiply Long) instructions
59 BLAKE2b digest algorithm optimized with ARM NEON instructions.
109 CTR when invoked in a context in which NEON instructions are unusable.
/arch/m68k/ifpsp060/src/
A DREADME-SRC2 support code, providing emulation for rarely used m68k instructions
/arch/x86/math-emu/
A DREADME154 an 80486DX. A 80486DX will allow some floating point instructions to
156 will not allow this in 16-bit protected mode: no instructions are
165 upon instruction mix. Relative performance is best for the instructions
166 which require most computation. The simple instructions are adversely
171 The times include load/store instructions. All times are in microseconds
233 these never exceeds 1/2 an lsb. The fprem and fprem1 instructions
316 The results show that the fsin, fcos and fptan instructions return
319 between -pi/2 and +pi/2. The other instructions have a lower
346 instructions return results which are in error for more than 10
351 was obtained per one million arguments. For three of the instructions,
[all …]
/arch/arm/nwfpe/
A DChangeLog74 * README.FPE - fix typo in description of lfm/sfm instructions
80 * README.FPE - fix description of URD, NRM instructions
81 * TODO - remove URD, NRM instructions from TODO list
A Dentry.S102 @ We need to be prepared for the instructions at .Lx1 and .Lx2
120 @ Only FPE instructions are dispatched here, everything else
/arch/arm64/
A DKconfig.debug8 instructions during context switch. Say Y here only if you are
A DKconfig482 instructions from hitting the window for corruption.
625 taken between a pair of AES instructions. These instructions
863 user-space should not be using these instructions.
1028 two ISB instructions if no ERET is to take place.
1807 bool "Emulate deprecated/obsolete ARMv8 instructions"
1821 bool "Emulate SWP/SWPB instructions"
1844 bool "Emulate CP15 Barrier instructions"
1849 instructions instead.
1917 bool "Atomic instructions"
1926 not support these instructions.
[all …]
/arch/x86/
A DKconfig.cpu83 extended instructions.
90 Pentium Pro extended instructions, and disables the init-time guard
109 extended prefetch instructions in addition to the Pentium II
148 some extended instructions, and passes appropriate optimization
156 some extended instructions, and passes appropriate optimization
178 treat this chip as a 586TSC with some extended instructions
186 treat this chip as a 586TSC with some extended instructions
220 kernel due to them lacking the 3DNow! instructions used in earlier
/arch/powerpc/platforms/
A DKconfig.cputype368 processes can execute altivec instructions.
385 processes can execute VSX instructions.
405 'spe enable' bit so user processes can execute SPE instructions.
457 and lower are not required to implement broadcast TLBIE instructions.
471 POWER10 and later CPUs support prefixed instructions, 8 byte
472 instructions that include large immediate, pc relative addressing,
475 This option builds the kernel with prefixed instructions, and
478 Kernel support for prefixed instructions in applications and guests
/arch/arm/mach-omap1/
A Dsleep.S190 @ Errata (HEL3SU467, section 1.4.4) specifies nop-instructions
196 @ => 74 nop-instructions
/arch/powerpc/perf/
A Dpower8-pmu.c126 GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL);
127 GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_FIN);
A Dpower7-pmu.c381 GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL);
384 GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_FIN);
A Dpower10-pmu.c122 GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL);
123 GENERIC_EVENT_ATTR(branch-instructions, PM_BR_CMPL);
129 GENERIC_EVENT_ATTR(branch-instructions, PM_BR_FIN);
A Dpower9-pmu.c169 GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL);
170 GENERIC_EVENT_ATTR(branch-instructions, PM_BR_CMPL);
/arch/x86/kvm/
A Dxen.c1308 u8 instructions[32]; in kvm_xen_write_hypercall_page() local
1315 instructions[0] = 0xb8; in kvm_xen_write_hypercall_page()
1318 kvm_x86_call(patch_hypercall)(vcpu, instructions + 5); in kvm_xen_write_hypercall_page()
1321 instructions[8] = 0xc3; in kvm_xen_write_hypercall_page()
1324 memset(instructions + 9, 0xcc, sizeof(instructions) - 9); in kvm_xen_write_hypercall_page()
1326 for (i = 0; i < PAGE_SIZE / sizeof(instructions); i++) { in kvm_xen_write_hypercall_page()
1327 *(u32 *)&instructions[1] = i; in kvm_xen_write_hypercall_page()
1329 page_addr + (i * sizeof(instructions)), in kvm_xen_write_hypercall_page()
1330 instructions, sizeof(instructions))) in kvm_xen_write_hypercall_page()

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