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/arch/arm/boot/dts/intel/ixp/
A DMakefile3 intel-ixp42x-linksys-nslu2.dtb \
4 intel-ixp42x-linksys-wrv54g.dtb \
5 intel-ixp42x-freecom-fsg-3.dtb \
6 intel-ixp42x-welltech-epbx100.dtb \
7 intel-ixp42x-ixdp425.dtb \
8 intel-ixp43x-kixrp435.dtb \
9 intel-ixp46x-ixdp465.dtb \
10 intel-ixp42x-adi-coyote.dtb \
11 intel-ixp42x-ixdpg425.dtb \
18 intel-ixp42x-arcom-vulcan.dtb \
[all …]
A Dintel-ixp45x-ixp46x.dtsi8 #include "intel-ixp4xx.dtsi"
19 compatible = "intel,ixp46x-rng";
24 compatible = "intel,ixp43x-interrupt";
32 compatible = "intel,ixp4xx-udc";
39 compatible = "intel,ixp4xx-i2c";
47 compatible = "intel,ixp4xx-ethernet";
50 intel,npe = <1>;
58 compatible = "intel,ixp4xx-ethernet";
61 intel,npe = <2>;
69 compatible = "intel,ixp4xx-ethernet";
[all …]
A Dintel-ixp42x-arcom-vulcan.dts10 #include "intel-ixp42x.dtsi"
55 intel,ixp4xx-eb-t3 = <3>;
57 intel,ixp4xx-eb-write-enable = <1>;
71 intel,ixp4xx-eb-t3 = <1>;
72 intel,ixp4xx-eb-t4 = <2>;
74 intel,ixp4xx-eb-write-enable = <1>;
75 intel,ixp4xx-eb-byte-access = <1>;
90 intel,ixp4xx-eb-t3 = <3>;
93 intel,ixp4xx-eb-byte-access = <1>;
103 intel,ixp4xx-eb-byte-access = <1>;
[all …]
A Dintel-ixp4xx.dtsi85 compatible = "intel,xscale-uart";
99 compatible = "intel,xscale-uart";
113 compatible = "intel,ixp4xx-gpio";
147 compatible = "intel,ixp4xx-hss";
149 intel,npe-handle = <&npe 0>;
154 compatible = "intel,ixp4xx-hss";
156 intel,npe-handle = <&npe 0>;
163 intel,npe-handle = <&npe 2>;
177 intel,npe-handle = <&npe 1>;
188 intel,npe-handle = <&npe 2>;
[all …]
A Dintel-ixp46x-ixdp465.dts9 #include "intel-ixp45x-ixp46x.dtsi"
10 #include "intel-ixp4xx-reference-design.dtsi"
15 compatible = "intel,ixdp465", "intel,ixp46x";
22 compatible = "intel,ixp4xx-flash", "cfi-flash";
25 intel,ixp4xx-eb-write-enable = <1>;
A Dintel-ixp42x-gateworks-gw2348.dts9 #include "intel-ixp42x.dtsi"
14 compatible = "gateworks,gw2348", "intel,ixp42x";
69 compatible = "intel,ixp4xx-flash", "cfi-flash";
72 intel,ixp4xx-eb-write-enable = <1>;
83 compatible = "intel,ixp4xx-compact-flash";
94 intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type
95 intel,ixp4xx-eb-byte-access-on-halfword = <1>;
96 intel,ixp4xx-eb-mux-address-and-data = <0>;
97 intel,ixp4xx-eb-ahb-split-transfers = <0>;
98 intel,ixp4xx-eb-write-enable = <1>;
[all …]
A Dintel-ixp43x-kixrp435.dts9 #include "intel-ixp43x.dtsi"
10 #include "intel-ixp4xx-reference-design.dtsi"
15 compatible = "intel,kixrp435", "intel,ixp43x";
22 compatible = "intel,ixp4xx-flash", "cfi-flash";
25 intel,ixp4xx-eb-write-enable = <1>;
65 intel,npe-handle = <&npe 0>;
A Dintel-ixp42x.dtsi6 #include "intel-ixp4xx.dtsi"
11 compatible = "intel,ixp42x-expansion-bus-controller", "syscon";
16 compatible = "intel,ixp42x-pci";
20 compatible = "intel,ixp42x-interrupt";
28 compatible = "intel,ixp4xx-udc";
A Dintel-ixp42x-usrobotics-usr8200.dts12 #include "intel-ixp42x.dtsi"
17 compatible = "usr,usr8200", "intel,ixp42x";
88 compatible = "intel,ixp4xx-flash", "cfi-flash";
91 intel,ixp4xx-eb-write-enable = <1>;
114 intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle
115 intel,ixp4xx-eb-byte-access-on-halfword = <0>;
116 intel,ixp4xx-eb-mux-address-and-data = <0>;
117 intel,ixp4xx-eb-ahb-split-transfers = <0>;
118 intel,ixp4xx-eb-write-enable = <1>;
119 intel,ixp4xx-eb-byte-access = <1>;
[all …]
A Dintel-ixp42x-goramo-multilink.dts16 #include "intel-ixp42x.dtsi"
69 compatible = "intel,ixp4xx-flash", "cfi-flash";
72 intel,ixp4xx-eb-write-enable = <1>;
121 intel,queue-chl-rxtrig = <&qmgr 12>;
122 intel,queue-chl-txready = <&qmgr 34>;
123 intel,queue-pkt-rx = <&qmgr 13>;
126 intel,queue-pkt-txdone = <&qmgr 22>;
136 intel,queue-chl-rxtrig = <&qmgr 10>;
137 intel,queue-chl-txready = <&qmgr 35>;
138 intel,queue-pkt-rx = <&qmgr 0>;
[all …]
A Dintel-ixp43x-gateworks-gw2358.dts8 #include "intel-ixp43x.dtsi"
12 compatible = "gateworks,gw2358", "intel,ixp43x";
82 compatible = "intel,ixp4xx-flash", "cfi-flash";
85 intel,ixp4xx-eb-write-enable = <1>;
99 compatible = "intel,ixp4xx-compact-flash";
111 intel,ixp4xx-eb-byte-access-on-halfword = <1>;
112 intel,ixp4xx-eb-mux-address-and-data = <0>;
113 intel,ixp4xx-eb-ahb-split-transfers = <0>;
114 intel,ixp4xx-eb-write-enable = <1>;
115 intel,ixp4xx-eb-byte-access = <1>;
[all …]
A Dintel-ixp42x-ixdp425.dts13 #include "intel-ixp42x.dtsi"
14 #include "intel-ixp4xx-reference-design.dtsi"
19 compatible = "intel,ixdp425", "intel,ixp42x";
26 compatible = "intel,ixp4xx-flash", "cfi-flash";
29 intel,ixp4xx-eb-write-enable = <1>;
A Dintel-ixp43x.dtsi7 #include "intel-ixp4xx.dtsi"
12 compatible = "intel,ixp43x-expansion-bus-controller", "syscon";
18 compatible = "intel,ixp43x-pci";
22 compatible = "intel,ixp43x-interrupt";
A Dintel-ixp4xx-reference-design.dtsi62 intel,ixp4xx-eb-t1 = <0>;
63 intel,ixp4xx-eb-t2 = <0>;
64 intel,ixp4xx-eb-t3 = <1>; // 1 cycle extra strobe phase
65 intel,ixp4xx-eb-t4 = <0>;
66 intel,ixp4xx-eb-t5 = <0>;
67 intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type
68 intel,ixp4xx-eb-byte-access-on-halfword = <0>;
69 intel,ixp4xx-eb-mux-address-and-data = <0>;
70 intel,ixp4xx-eb-ahb-split-transfers = <0>;
71 intel,ixp4xx-eb-write-enable = <1>;
[all …]
A Dintel-ixp42x-ixdpg425.dts17 #include "intel-ixp42x.dtsi"
22 compatible = "intel,ixdpg425", "intel,ixp42x";
44 compatible = "intel,ixp4xx-flash", "cfi-flash";
53 intel,ixp4xx-eb-write-enable = <1>;
A Dintel-ixp42x-welltech-epbx100.dts8 #include "intel-ixp42x.dtsi"
12 compatible = "welltech,epbx100", "intel,ixp42x";
34 compatible = "intel,ixp4xx-flash", "cfi-flash";
A Dintel-ixp42x-gateway-7001.dts9 #include "intel-ixp42x.dtsi"
14 compatible = "gateway,7001", "intel,ixp42x";
37 compatible = "intel,ixp4xx-flash", "cfi-flash";
45 intel,ixp4xx-eb-write-enable = <1>;
A Dintel-ixp42x-adi-coyote.dts10 #include "intel-ixp42x.dtsi"
15 compatible = "adieng,coyote", "intel,ixp42x";
39 compatible = "intel,ixp4xx-flash", "cfi-flash";
48 intel,ixp4xx-eb-write-enable = <1>;
/arch/x86/events/intel/
A DMakefile5 obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel-uncore.o
6 intel-uncore-objs := uncore.o uncore_nhmex.o uncore_snb.o uncore_snbep.o uncore_discovery.o
7 obj-$(CONFIG_PERF_EVENTS_INTEL_CSTATE) += intel-cstate.o
8 intel-cstate-objs := cstate.o
/arch/x86/platform/ce4100/
A Dfalconfalls.dts9 model = "intel,falconfalls";
10 compatible = "intel,falconfalls";
20 compatible = "intel,ce4100";
29 compatible = "intel,ce4100-cp";
34 compatible = "intel,ce4100-ioapic";
40 compatible = "intel,ce4100-hpet";
45 compatible = "intel,ce4100-lapic";
52 compatible = "intel,ce4100-pci", "pci";
62 compatible = "intel,ce4100-ioapic";
71 compatible = "intel,ce4100-pci", "pci";
[all …]
/arch/x86/platform/
A DMakefile8 obj-y += intel/
9 obj-y += intel-mid/
10 obj-y += intel-quark/
/arch/x86/kvm/
A DMakefile17 kvm-intel-y += vmx/vmx.o vmx/vmenter.o vmx/pmu_intel.o vmx/vmcs12.o \
20 kvm-intel-$(CONFIG_X86_SGX_KVM) += vmx/sgx.o
21 kvm-intel-$(CONFIG_KVM_HYPERV) += vmx/hyperv.o vmx/hyperv_evmcs.o
22 kvm-intel-$(CONFIG_KVM_INTEL_TDX) += vmx/tdx.o
31 kvm-intel-y += vmx/vmx_onhyperv.o vmx/hyperv_evmcs.o
36 obj-$(CONFIG_KVM_INTEL) += kvm-intel.o
/arch/arm64/boot/dts/intel/
A Dsocfpga_agilex_n6000.dts9 compatible = "intel,socfpga-agilex-n6000", "intel,socfpga-agilex";
40 compatible = "intel,hps-copy-engine";
A Dkeembay-evm.dts14 compatible = "intel,keembay-evm", "intel,keembay";
/arch/x86/crypto/
A DMakefile45 obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o
46 aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o
47 aesni-intel-$(CONFIG_64BIT) += aes-ctr-avx-x86_64.o \
51 aesni-intel-$(CONFIG_64BIT) += aes-gcm-avx10-x86_64.o
54 obj-$(CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL) += ghash-clmulni-intel.o
55 ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o

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